s390x: Support the PPA instruction

The perform processor assist (PPA) instruction provides the CPU with
special execution hints.  It belongs to the processor-assist facility,
which shares facility bit 49 with the execution-hint and load-and-trap
facilities and with the miscellaneous-instruction-extensions facility 1.

Implementing PPA enables setting facility bit 49 to one.  Similar to other
execution hint instructions, implement PPA as a no-op for now.

diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c
index 6639b1b7bc4de35c1afe8970ffd87145da4dd04d..f2ef1937657681567c029c9df98447642f5e1a58 100644 (file)
--- a/VEX/priv/guest_s390_toIR.c
+++ b/VEX/priv/guest_s390_toIR.c
@@ -20664,6 +20664,15 @@ s390_irgen_NIAI(UChar i1, UChar i2)
    return "niai";
 }
 
+static const HChar *
+s390_irgen_PPA(UChar m3, UChar r1, UChar r2)
+{
+   /* Treat as a no-op.  m3 could indicate one of the following:
+       1: transaction-abort assist -- fine, we don't support transactions
+      15: in-order-execution assist -- we don't claim support */
+   return "ppa";
+}
+
 /* New insns are added here.
    If an insn is contingent on a facility being installed also
    check whether function do_extension_STFLE needs updating. */
@@ -21020,7 +21029,8 @@ s390_decode_4byte_and_irgen(const UChar *bytes)
    case 0xb2e1: /* SPCTR */ goto unimplemented;
    case 0xb2e4: /* ECCTR */ goto unimplemented;
    case 0xb2e5: /* EPCTR */ goto unimplemented;
-   case 0xb2e8: /* PPA */ goto unimplemented;
+   case 0xb2e8: s390_format_RRFa_U0RR(s390_irgen_PPA, RRF2_m3(ovl),
+                                      RRF2_r1(ovl), RRF2_r2(ovl));  goto ok;
    case 0xb2ec: /* ETND */ goto unimplemented;
    case 0xb2ed: /* ECPGA */ goto unimplemented;
    case 0xb2f8: /* TEND */ goto unimplemented;

diff --git a/coregrind/m_extension/extension-s390x.c b/coregrind/m_extension/extension-s390x.c
index 5751afc87bbf5d6c8e1dd524b3ce27c97874ea4a..85b99ad086876a61b15aa0f8b45d8a20ec2a511c 100644 (file)
--- a/coregrind/m_extension/extension-s390x.c
+++ b/coregrind/m_extension/extension-s390x.c
@@ -861,7 +861,7 @@ static enum ExtensionError do_extension_STFLE(ThreadState* tst, ULong variant)
        /* 44: PFPO, not fully supported */
        | S390_SETBITS(45, 47)
        /* 48: DFP zoned-conversion, not supported */
-       /* 49: includes PPA, not supported */
+       | S390_SETBITS(49, 49)
        /* 50: constrained transactional-execution, not supported */
        | S390_SETBITS(51, 55)
        /* 56: unassigned */

diff --git a/docs/internals/s390-opcodes.csv b/docs/internals/s390-opcodes.csv
index 1d4afb75bb95e163f9307ff50d1df700fabeddc9..abee097ace9499bd0fed0e5c6a929399310a9615 100644 (file)
--- a/docs/internals/s390-opcodes.csv
+++ b/docs/internals/s390-opcodes.csv
@@ -968,7 +968,7 @@ tbeginc,"constrained transaction begin","not implemented",zEC12,
 tend,"transaction end","not implemented",zEC12,
 bpp,"branch prediction preload",implemented,zEC12,
 bprp,"branch prediction relative preload",implemented,zEC12,
-ppa,"perform processor assist","not implemented",zEC12,
+ppa,"perform processor assist",implemented,zEC12,
 niai,"next instruction access intent",implemented,zEC12,
 crdte,"compare and replace DAT table entry",N/A,"privileged instruction"
 lat,"load and trap 32 bit",implemented,zEC12,

diff --git a/none/tests/s390x/disasm-test/opcode.c b/none/tests/s390x/disasm-test/opcode.c
index bed2e278e454657d4462c6ed4029bd7c4747c946..24684a613a9f6986b2076cd908b98d701c4e1b05 100644 (file)
--- a/none/tests/s390x/disasm-test/opcode.c
+++ b/none/tests/s390x/disasm-test/opcode.c
@@ -106,6 +106,7 @@
    msa8  --> message-security-assist extension 8
    msa9  --> message-security-assist extension 9
    nnpa  --> neural-network-processing-assist facility
+   ppa   --> processor-assist facility
    pfpo  --> PFPO facility
    popc  --> population-count facility  == lsc
    stckf --> STCKF facility
@@ -729,7 +730,7 @@ static const char *opcodes[] = {
    "pcc",                       // msa4
 
    // plo   not implemented
-   // ppa   not implemented
+   "ppa    r1,r2,m3:{1,15}",    // ppa     no spec exception for m3
 
    "ppno   r1,r2",              // msa5
    "prno   r1,r2",              // msa5