gcc/
PR target/88558
* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
Enable SImode on FP registers for P7.
* config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
move between FP registers. Set attribute isa of stfiwx to "*"
and attribute of stxsiwx to "p7".
if(GET_MODE_SIZE (mode) == UNITS_PER_FP_WORD)
return 1;
- if (TARGET_P8_VECTOR && (mode == SImode))
+ if (TARGET_POPCNTD && mode == SImode)
return 1;
if (TARGET_P9_VECTOR && (mode == QImode || mode == HImode))
(define_insn "*movsi_internal1"
[(set (match_operand:SI 0 "nonimmediate_operand"
- "=r, r,
+ "=r, r, d,
r, d, v,
m, ?Z, ?Z,
r, r, r, r,
wa, r,
r, *h, *h")
(match_operand:SI 1 "input_operand"
- "r, U,
+ "r, U, d,
m, ?Z, ?Z,
r, d, v,
I, L, eI, n,
"@
mr %0,%1
la %0,%a1
+ fmr %0,%1
lwz%U1%X1 %0,%1
lfiwzx %0,%y1
lxsiwzx %x0,%y1
mt%0 %1
nop"
[(set_attr "type"
- "*, *,
+ "*, *, fpsimple,
load, fpload, fpload,
store, fpstore, fpstore,
*, *, *, *,
mtvsr, mfvsr,
*, *, *")
(set_attr "length"
- "*, *,
+ "*, *, *,
*, *, *,
*, *, *,
*, *, *, 8,
*, *,
*, *, *")
(set_attr "isa"
- "*, *,
- *, p8v, p8v,
- *, p8v, p8v,
+ "*, *, *,
+ *, p7, p8v,
+ *, *, p8v,
*, *, p10, *,
p8v, p9v, p9v, p8v,
p9v, p8v, p9v,