When pinning a temp register after it is reused by the column cache, make

sure all instances of that register in the cache are pinned so that the
register is never reused for a different purpose.  Ticket #3879. (CVS 6676)

FossilOrigin-Name: 5f358e63712e8de93bd6fecc5131badeef0292be

diff --git a/manifest b/manifest
index d1f7db3e25ccf2831235be1408c607a82d623146..375ac86a15463212078559468c80750258b56d47 100644 (file)
--- a/manifest
+++ b/manifest
@@ -1,5 +1,5 @@
-C Add\sa\stest\scase\sfor\sticket\s#3879.\s(CVS\s6675)
-D 2009-05-25T11:46:11
+C When\spinning\sa\stemp\sregister\safter\sit\sis\sreused\sby\sthe\scolumn\scache,\smake\nsure\sall\sinstances\sof\sthat\sregister\sin\sthe\scache\sare\spinned\sso\sthat\sthe\nregister\sis\snever\sreused\sfor\sa\sdifferent\spurpose.\s\sTicket\s#3879.\s(CVS\s6676)
+D 2009-05-25T11:46:29
 F Makefile.arm-wince-mingw32ce-gcc fcd5e9cd67fe88836360bb4f9ef4cb7f8e2fb5a0
 F Makefile.in 583e87706abc3026960ed759aff6371faf84c211
 F Makefile.linux-gcc d53183f4aa6a9192d249731c90dbdffbd2c68654
@@ -114,7 +114,7 @@ F src/callback.c 57359fa93de47c341b6b8ee504a88ff276397686
 F src/complete.c 5ad5c6cd4548211867c204c41a126d73a9fbcea0
 F src/date.c ab5f7137656652a48434d64f96bdcdc823bb23b3
 F src/delete.c a0a0932eea77471ab243337026abbce444024c43
-F src/expr.c a6d3c715082d535f54960e19f17687a22567c6a7
+F src/expr.c af190966891a8418def1c47588bbb522cdb3a6c5
 F src/fault.c dc88c821842157460750d2d61a8a8b4197d047ff
 F src/func.c f667fe886309707c7178542073bb0ced00a9fae7
 F src/global.c 448419c44ce0701104c2121b0e06919b44514c0c
@@ -731,7 +731,7 @@ F tool/speedtest16.c c8a9c793df96db7e4933f0852abb7a03d48f2e81
 F tool/speedtest2.tcl ee2149167303ba8e95af97873c575c3e0fab58ff
 F tool/speedtest8.c 2902c46588c40b55661e471d7a86e4dd71a18224
 F tool/speedtest8inst1.c 293327bc76823f473684d589a8160bde1f52c14e
-P dd75e376e8fed4f2e347672d483ee7c1929007cf
-R 3377cc898561326f0eeb4c2032ec307c
-U danielk1977
-Z 71121ca32fca9662a2663bcd83553f28
+P 5b9b66f47b0b8178427806149958387d32b70dc2
+R 750f669592bc4ad4b5798606367d9730
+U drh
+Z 7b464a9202f9fae1b3901cba6c13689b

diff --git a/manifest.uuid b/manifest.uuid
index fd04926737a544d9ad884a74c7e913336c4e02eb..ff9b301c0d3008b196916b410a8759d8825da1f0 100644 (file)
--- a/manifest.uuid
+++ b/manifest.uuid
@@ -1 +1 @@
-5b9b66f47b0b8178427806149958387d32b70dc2
\ No newline at end of file
+5f358e63712e8de93bd6fecc5131badeef0292be
\ No newline at end of file

diff --git a/src/expr.c b/src/expr.c
index 5e1c7c59f7234992a5af580f2c39d065747d93cc..fdbffc584dbddce5c969171f89eb74872526aa77 100644 (file)
--- a/src/expr.c
+++ b/src/expr.c
@@ -12,7 +12,7 @@
 ** This file contains routines used for analyzing expressions and
 ** for generating VDBE code that evaluates expressions in SQLite.
 **
-** $Id: expr.c,v 1.435 2009/05/21 20:41:32 drh Exp $
+** $Id: expr.c,v 1.436 2009/05/25 11:46:29 drh Exp $
 */
 #include "sqliteInt.h"
 
@@ -1800,6 +1800,22 @@ void sqlite3ExprCachePop(Parse *pParse, int N){
   }
 }
 
+/*
+** When a cached column is reused, make sure that its register is
+** no longer available as a temp register.  ticket #3879:  that same
+** register might be in the cache in multiple places, so be sure to
+** get them all.
+*/
+static void sqlite3ExprCachePinRegister(Parse *pParse, int iReg){
+  int i;
+  struct yColCache *p;
+  for(i=0, p=pParse->aColCache; i<SQLITE_N_COLCACHE; i++, p++){
+    if( p->iReg==iReg ){
+      p->tempReg = 0;
+    }
+  }
+}
+
 /*
 ** Generate code that will extract the iColumn-th column from
 ** table pTab and store the column value in a register.  An effort
@@ -1835,7 +1851,7 @@ int sqlite3ExprCodeGetColumn(
       VdbeComment((v, "OPT: tab%d.col%d -> r%d", iTable, iColumn, p->iReg));
 #endif
       p->lru = pParse->iCacheCnt++;
-      p->tempReg = 0;  /* This pins the register, but also leaks it */
+      sqlite3ExprCachePinRegister(pParse, p->iReg);
       return p->iReg;
     }
   }