In converting marvell,comphy-cp110 to schema, the constraints for clocks on
marvell,comphy-a3700 are wrong, the maximum number of child nodes are wrong,
and the phy nodes may have a 'connector' child node:
phy@18300 (marvell,comphy-a3700): clock-names: False schema does not allow ['xtal']
phy@120000 (marvell,comphy-cp110): 'phy@3', 'phy@4', 'phy@5' do not match any of the regexes: '^phy@[0-2]$', '^pinctrl-[0-9]+$'
phy@120000 (marvell,comphy-cp110): phy@2: 'connector' does not match any of the regexes: '^pinctrl-[0-9]+$'
Fixes: 50355ac70d4f ("dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema")
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20250806200138.1366189-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
const: 0
clocks:
+ minItems: 1
maxItems: 3
- description: Reference clocks for CP110; MG clock, MG Core clock, AXI clock
clock-names:
- items:
- - const: mg_clk
- - const: mg_core_clk
- - const: axi_clk
+ minItems: 1
+ maxItems: 3
marvell,system-controller:
description: Phandle to the Marvell system controller (CP110 only)
$ref: /schemas/types.yaml#/definitions/phandle
patternProperties:
- '^phy@[0-2]$':
+ '^phy@[0-5]$':
description: A COMPHY lane child node
type: object
additionalProperties: false
properties:
reg:
description: COMPHY lane number
+ maximum: 5
'#phy-cells':
const: 1
+ connector:
+ type: object
+
required:
- reg
- '#phy-cells'
then:
properties:
- clocks: false
- clock-names: false
+ clocks:
+ maxItems: 1
+ clock-names:
+ const: xtal
required:
- reg-names
else:
+ properties:
+ clocks:
+ minItems: 3
+ clock-names:
+ items:
+ - const: mg_clk
+ - const: mg_core_clk
+ - const: axi_clk
+
required:
- marvell,system-controller