Fixes for 5.10

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-5.10/pinctrl-aspeed-fix-confusing-types-in-return-value.patch b/queue-5.10/pinctrl-aspeed-fix-confusing-types-in-return-value.patch
new file mode 100644 (file)
index 0000000..f82810f
--- /dev/null
+++ b/queue-5.10/pinctrl-aspeed-fix-confusing-types-in-return-value.patch
@@ -0,0 +1,38 @@
+From 524bd6531a66780eb4df6a76d5f5faa4bff1670c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 20 Jan 2023 09:48:56 +1030
+Subject: pinctrl: aspeed: Fix confusing types in return value
+
+From: Joel Stanley <joel@jms.id.au>
+
+[ Upstream commit 287a344a11f1ebd31055cf9b22c88d7005f108d7 ]
+
+The function signature is int, but we return a bool. Instead return a
+negative errno as the kerneldoc suggests.
+
+Fixes: 4d3d0e4272d8 ("pinctrl: Add core support for Aspeed SoCs")
+Signed-off-by: Joel Stanley <joel@jms.id.au>
+Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
+Link: https://lore.kernel.org/r/20230119231856.52014-1-joel@jms.id.au
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+index e792318c38946..d26d859546275 100644
+--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
++++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+@@ -121,7 +121,7 @@ static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx,
+       int ret = 0;
+ 
+       if (!exprs)
+-              return true;
++              return -EINVAL;
+ 
+       while (*exprs && !ret) {
+               ret = aspeed_sig_expr_disable(ctx, *exprs);
+-- 
+2.39.0
+

diff --git a/queue-5.10/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch b/queue-5.10/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch
new file mode 100644 (file)
index 0000000..dab3d99
--- /dev/null
+++ b/queue-5.10/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch
@@ -0,0 +1,69 @@
+From 83b4093bf908f017379f8a9a6d9c35d050062710 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 6 Feb 2023 16:15:59 +0200
+Subject: pinctrl: intel: Restore the pins that used to be in Direct IRQ mode
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+[ Upstream commit a8520be3ffef3d25b53bf171a7ebe17ee0154175 ]
+
+If the firmware mangled the register contents too much,
+check the saved value for the Direct IRQ mode. If it
+matches, we will restore the pin state.
+
+Reported-by: Jim Minter <jimminter@microsoft.com>
+Fixes: 6989ea4881c8 ("pinctrl: intel: Save and restore pins in "direct IRQ" mode")
+Tested-by: Jim Minter <jimminter@microsoft.com>
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Link: https://lore.kernel.org/r/20230206141558.20916-1-andriy.shevchenko@linux.intel.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/intel/pinctrl-intel.c | 16 +++++++++++++---
+ 1 file changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
+index db9087c129c0d..2ef9e2d8fd9c5 100644
+--- a/drivers/pinctrl/intel/pinctrl-intel.c
++++ b/drivers/pinctrl/intel/pinctrl-intel.c
+@@ -1606,6 +1606,12 @@ const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_
+ EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data);
+ 
+ #ifdef CONFIG_PM_SLEEP
++static bool __intel_gpio_is_direct_irq(u32 value)
++{
++      return (value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&
++             (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO);
++}
++
+ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
+@@ -1639,8 +1645,7 @@ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int
+        * See https://bugzilla.kernel.org/show_bug.cgi?id=214749.
+        */
+       value = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
+-      if ((value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&
+-          (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO))
++      if (__intel_gpio_is_direct_irq(value))
+               return true;
+ 
+       return false;
+@@ -1770,7 +1775,12 @@ int intel_pinctrl_resume_noirq(struct device *dev)
+       for (i = 0; i < pctrl->soc->npins; i++) {
+               const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+ 
+-              if (!intel_pinctrl_should_save(pctrl, desc->number))
++              if (!(intel_pinctrl_should_save(pctrl, desc->number) ||
++                    /*
++                     * If the firmware mangled the register contents too much,
++                     * check the saved value for the Direct IRQ mode.
++                     */
++                    __intel_gpio_is_direct_irq(pads[i].padcfg0)))
+                       continue;
+ 
+               intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0);
+-- 
+2.39.0
+

diff --git a/queue-5.10/pinctrl-single-fix-potential-null-dereference.patch b/queue-5.10/pinctrl-single-fix-potential-null-dereference.patch
new file mode 100644 (file)
index 0000000..0a7bd20
--- /dev/null
+++ b/queue-5.10/pinctrl-single-fix-potential-null-dereference.patch
@@ -0,0 +1,41 @@
+From bac93c5cd626b6f44ed3e3e788e5bef921734208 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 18 Nov 2022 13:43:32 +0300
+Subject: pinctrl: single: fix potential NULL dereference
+
+From: Maxim Korotkov <korotkov.maxim.s@gmail.com>
+
+[ Upstream commit d2d73e6d4822140445ad4a7b1c6091e0f5fe703b ]
+
+Added checking of pointer "function" in pcs_set_mux().
+pinmux_generic_get_function() can return NULL and the pointer
+"function" was dereferenced without checking against NULL.
+
+Found by Linux Verification Center (linuxtesting.org) with SVACE.
+
+Fixes: 571aec4df5b7 ("pinctrl: single: Use generic pinmux helpers for managing functions")
+Signed-off-by: Maxim Korotkov <korotkov.maxim.s@gmail.com>
+Reviewed-by: Tony Lindgren <tony@atomide.com>
+Link: https://lore.kernel.org/r/20221118104332.943-1-korotkov.maxim.s@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/pinctrl-single.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
+index d139cd9e6d130..22e471933b373 100644
+--- a/drivers/pinctrl/pinctrl-single.c
++++ b/drivers/pinctrl/pinctrl-single.c
+@@ -372,6 +372,8 @@ static int pcs_set_mux(struct pinctrl_dev *pctldev, unsigned fselector,
+       if (!pcs->fmask)
+               return 0;
+       function = pinmux_generic_get_function(pctldev, fselector);
++      if (!function)
++              return -EINVAL;
+       func = function->data;
+       if (!func)
+               return -EINVAL;
+-- 
+2.39.0
+

diff --git a/queue-5.10/series b/queue-5.10/series
index fe453864bd4413da6a358f753259d4b78cfdd676..271cc390d16b46044c87ddfd7ec80e971fe18ade 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -121,3 +121,7 @@ net-mlx5-fw_tracer-zero-consumer-index-when-reloadin.patch
 rds-rds_rm_zerocopy_callback-use-list_first_entry.patch
 selftests-forwarding-lib-quote-the-sysctl-values.patch
 alsa-pci-lx6464es-fix-a-debug-loop.patch
+pinctrl-aspeed-fix-confusing-types-in-return-value.patch
+pinctrl-single-fix-potential-null-dereference.patch
+spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch
+pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch

diff --git a/queue-5.10/spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch b/queue-5.10/spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch
new file mode 100644 (file)
index 0000000..5efa0d7
--- /dev/null
+++ b/queue-5.10/spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch
@@ -0,0 +1,47 @@
+From 2a7736ed0c50f9f518e62b820c40d59d615acec2 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 13 Jan 2023 21:59:42 +0300
+Subject: spi: dw: Fix wrong FIFO level setting for long xfers
+
+From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+
+[ Upstream commit c63b8fd14a7db719f8252038a790638728c4eb66 ]
+
+Due to using the u16 type in the min_t() macros the SPI transfer length
+will be cast to word before participating in the conditional statement
+implied by the macro. Thus if the transfer length is greater than 64KB the
+Tx/Rx FIFO threshold level value will be determined by the leftover of the
+truncated after the type-case length. In the worst case it will cause the
+dramatical performance drop due to the "Tx FIFO Empty" or "Rx FIFO Full"
+interrupts triggered on each xfer word sent/received to/from the bus.
+
+The problem can be easily fixed by specifying the unsigned int type in the
+min_t() macros thus preventing the possible data loss.
+
+Fixes: ea11370fffdf ("spi: dw: get TX level without an additional variable")
+Reported-by: Sergey Nazarov <Sergey.Nazarov@baikalelectronics.ru>
+Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Link: https://lore.kernel.org/r/20230113185942.2516-1-Sergey.Semin@baikalelectronics.ru
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/spi/spi-dw-core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
+index c33866f747dbe..aa116cee1fd8d 100644
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -353,7 +353,7 @@ static void dw_spi_irq_setup(struct dw_spi *dws)
+        * will be adjusted at the final stage of the IRQ-based SPI transfer
+        * execution so not to lose the leftover of the incoming data.
+        */
+-      level = min_t(u16, dws->fifo_len / 2, dws->tx_len);
++      level = min_t(unsigned int, dws->fifo_len / 2, dws->tx_len);
+       dw_writel(dws, DW_SPI_TXFTLR, level);
+       dw_writel(dws, DW_SPI_RXFTLR, level - 1);
+ 
+-- 
+2.39.0
+