arm64: versal: Add support for vck190 rev1.1

Difference is quite small which is just using new level shifter for SD
which requires different tap delay setting. Also to be safe remove
sdhci-caps-mask, sdhci-caps and max-frequency properties which were in the
tree for some time to have support for multiple board revisions with the
same SW.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 871986ad583449f814f898e601f6008899da9c8b..bc9e7c3ed34569c8a694d27922c06d5e2adf7e14 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -403,6 +403,10 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
        versal-vck190-revA-x-ebm-01-revA.dtb \
        versal-vck190-revA-x-ebm-02-revA.dtb \
        versal-vck190-revA-x-ebm-03-revA.dtb \
+       versal-vck190-rev1.1.dtb \
+       versal-vck190-rev1.1-x-ebm-01-revA.dtb \
+       versal-vck190-rev1.1-x-ebm-02-revA.dtb \
+       versal-vck190-rev1.1-x-ebm-03-revA.dtb \
        versal-vck5000-revA.dtb \
        versal-vc-p-a2197-00-revA.dtb \
        versal-vc-p-a2197-00-revA-x-prc-01-revA.dtb \
@@ -416,6 +420,10 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
        versal-vmk180-revA-x-ebm-01-revA.dtb \
        versal-vmk180-revA-x-ebm-02-revA.dtb \
        versal-vmk180-revA-x-ebm-03-revA.dtb \
+       versal-vmk180-rev1.1.dtb \
+       versal-vmk180-rev1.1-x-ebm-01-revA.dtb \
+       versal-vmk180-rev1.1-x-ebm-02-revA.dtb \
+       versal-vmk180-rev1.1-x-ebm-03-revA.dtb \
        versal-vpk120-revA.dtb \
        versal-vpk120-revB.dtb \
        versal-vp-x-a2785-00-revA.dtb \

diff --git a/arch/arm/dts/versal-vck190-rev1.1-x-ebm-01-revA.dts b/arch/arm/dts/versal-vck190-rev1.1-x-ebm-01-revA.dts
new file mode 100644 (file)
index 0000000..e49c1eb
--- /dev/null
+++ b/arch/arm/dts/versal-vck190-rev1.1-x-ebm-01-revA.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vck190 rev1.1 with X-EBM-01-revA module
+ *
+ * (C) Copyright 2019 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1-x-ebm-01-revA.dts"
+
+/ {
+       compatible = "xlnx,versal-vck190-rev1.1-x-ebm-01-revA",
+                    "xlnx,versal-vck190-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vck190 Eval board rev1.1 (QSPI)";
+};

diff --git a/arch/arm/dts/versal-vck190-rev1.1-x-ebm-02-revA.dts b/arch/arm/dts/versal-vck190-rev1.1-x-ebm-02-revA.dts
new file mode 100644 (file)
index 0000000..0f79996
--- /dev/null
+++ b/arch/arm/dts/versal-vck190-rev1.1-x-ebm-02-revA.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vck190 rev1.1 with X-EBM-02-revA module
+ *
+ * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1-x-ebm-02-revA.dts"
+
+/ {
+       compatible = "xlnx,versal-vck190-rev1.1-x-ebm-02-revA",
+                    "xlnx,versal-vck190-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vck190 Eval board rev1.1 (EMMC)";
+};

diff --git a/arch/arm/dts/versal-vck190-rev1.1-x-ebm-03-revA.dts b/arch/arm/dts/versal-vck190-rev1.1-x-ebm-03-revA.dts
new file mode 100644 (file)
index 0000000..ec3528f
--- /dev/null
+++ b/arch/arm/dts/versal-vck190-rev1.1-x-ebm-03-revA.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vck190 rev1.1 with X-EBM-03-revA module
+ *
+ * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1-x-ebm-03-revA.dts"
+
+/ {
+       compatible = "xlnx,versal-vck190-rev1.1-x-ebm-03-revA",
+                    "xlnx,versal-vck190-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vck190 Eval board rev1.1 (OSPI)";
+};

diff --git a/arch/arm/dts/versal-vck190-rev1.1.dts b/arch/arm/dts/versal-vck190-rev1.1.dts
new file mode 100644 (file)
index 0000000..7ce1d59
--- /dev/null
+++ b/arch/arm/dts/versal-vck190-rev1.1.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vck190 rev1.1
+ *
+ * (C) Copyright 2019 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1.dts"
+
+/ {
+       compatible = "xlnx,versal-vck190-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vck190 Eval board rev1.1";
+};

diff --git a/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-01-revA.dts b/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-01-revA.dts
new file mode 100644 (file)
index 0000000..7e5e6be
--- /dev/null
+++ b/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-01-revA.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vmk180 rev1.1 with X-EBM-01-revA module
+ *
+ * (C) Copyright 2019 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1.dts"
+
+/ {
+       compatible = "xlnx,versal-vmk180-rev1.1-x-ebm-01-revA",
+                    "xlnx,versal-vmk180-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vmk180 Eval board rev1.1 (QSPI)";
+};
+
+&qspi {
+#include "versal-x-ebm-01-revA.dtsi"
+};

diff --git a/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-02-revA.dts b/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-02-revA.dts
new file mode 100644 (file)
index 0000000..58682ec
--- /dev/null
+++ b/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-02-revA.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vmk180 rev1.1 with X-EBM-02-revA module
+ *
+ * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1.dts"
+
+/ {
+       compatible = "xlnx,versal-vmk180-rev1.1-x-ebm-02-revA",
+                    "xlnx,versal-vmk180-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vmk180 Eval board rev1.1 (EMMC)";
+};
+
+&sdhci1 {
+#include "versal-x-ebm-02-revA.dtsi"
+};

diff --git a/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-03-revA.dts b/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-03-revA.dts
new file mode 100644 (file)
index 0000000..39f381e
--- /dev/null
+++ b/arch/arm/dts/versal-vmk180-rev1.1-x-ebm-03-revA.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vmk180 rev1.1 with X-EBM-03-revA module
+ *
+ * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-rev1.1.dts"
+
+/ {
+       compatible = "xlnx,versal-vmk180-rev1.1-x-ebm-03-revA",
+                    "xlnx,versal-vmk180-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vmk180 Eval board rev1.1 (OSPI)";
+};
+
+&ospi {
+#include "versal-x-ebm-03-revA.dtsi"
+};

diff --git a/arch/arm/dts/versal-vmk180-rev1.1.dts b/arch/arm/dts/versal-vmk180-rev1.1.dts
new file mode 100644 (file)
index 0000000..bb3a3a1
--- /dev/null
+++ b/arch/arm/dts/versal-vmk180-rev1.1.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal vmk180 rev1.1
+ *
+ * (C) Copyright 2019 - 2021, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vmk180-revA.dts"
+
+/ {
+       compatible = "xlnx,versal-vmk180-rev1.1", "xlnx,versal";
+       model = "Xilinx Versal vmk180 Eval board rev1.1";
+};
+
+&sdhci1 { /* PMC_MIO26-36/51 */
+       /delete-property/ sdhci-caps-mask;
+       /delete-property/ sdhci-caps;
+       /delete-property/ max-frequency;
+       clk-phase-sd-hs = <111>, <48>;
+       clk-phase-uhs-sdr25 = <114>, <48>;
+       clk-phase-uhs-ddr50 = <126>, <36>;
+};