]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
re PR middle-end/39943 (wrong conversion from unsigned int to float)
authorRichard Guenther <rguenther@suse.de>
Wed, 29 Apr 2009 18:07:23 +0000 (18:07 +0000)
committerRichard Biener <rguenth@gcc.gnu.org>
Wed, 29 Apr 2009 18:07:23 +0000 (18:07 +0000)
2009-04-29  Richard Guenther  <rguenther@suse.de>

PR target/39943
* config/i386/i386.c (ix86_vectorize_builtin_conversion): Only
allow conversion to signed integers.

* lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt):
New.
(check_effective_target_vect_floatuint_cvt): Likewise.
* gcc.dg/vect/slp-10.c: Adjust.
* gcc.dg/vect/slp-11.c: Adjust.
* gcc.dg/vect/slp-12b.c: Adjust.
* gcc.dg/vect/slp-33.c: Adjust.
* gcc.c-torture/compile/pr39943.c: New testcase.

From-SVN: r146984

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.c-torture/compile/pr39943.c [new file with mode: 0644]
gcc/testsuite/gcc.dg/vect/slp-10.c
gcc/testsuite/gcc.dg/vect/slp-11.c
gcc/testsuite/gcc.dg/vect/slp-12b.c
gcc/testsuite/gcc.dg/vect/slp-33.c
gcc/testsuite/lib/target-supports.exp

index 3795ef4119fef4649d79f2f8bf8ed9f923b39b06..c7a97ddde62ea280a7e4f87668b5e2f664168f6a 100644 (file)
@@ -1,3 +1,9 @@
+2009-04-29  Richard Guenther  <rguenther@suse.de>
+
+       PR target/39943
+       * config/i386/i386.c (ix86_vectorize_builtin_conversion): Only
+       allow conversion to signed integers.
+
 2009-04-29  Richard Guenther  <rguenther@suse.de>
 
        * tree-cfg.c (verify_gimple_assign_binary): Allow vector
index 650325ad1058abc07eba2b1e9f936e399d5ed8fe..5e7689b837d4e37b5c15a568a33a827aa66624da 100644 (file)
@@ -25639,7 +25639,9 @@ ix86_veclibabi_acml (enum built_in_function fn, tree type_out, tree type_in)
 static tree
 ix86_vectorize_builtin_conversion (unsigned int code, tree type)
 {
-  if (TREE_CODE (type) != VECTOR_TYPE)
+  if (TREE_CODE (type) != VECTOR_TYPE
+      /* There are only conversions from/to signed integers.  */
+      || TYPE_UNSIGNED (TREE_TYPE (type)))
     return NULL_TREE;
 
   switch (code)
index beb916f9e025eba9c7a248ba029ab2271278be63..4c28af643ef4975c4f782e1ff0eecd904065b105 100644 (file)
@@ -1,3 +1,15 @@
+2009-04-29  Richard Guenther  <rguenther@suse.de>
+
+       PR target/39943
+       * lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt):
+       New.
+       (check_effective_target_vect_floatuint_cvt): Likewise.
+       * gcc.dg/vect/slp-10.c: Adjust.
+       * gcc.dg/vect/slp-11.c: Adjust.
+       * gcc.dg/vect/slp-12b.c: Adjust.
+       * gcc.dg/vect/slp-33.c: Adjust.
+       * gcc.c-torture/compile/pr39943.c: New testcase.
+
 2009-04-29  Richard Guenther  <rguenther@suse.de>
 
        PR middle-end/39937
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr39943.c b/gcc/testsuite/gcc.c-torture/compile/pr39943.c
new file mode 100644 (file)
index 0000000..537ba43
--- /dev/null
@@ -0,0 +1,7 @@
+void gl_fog_index_pixels(float f, unsigned int n, unsigned int index[])
+{ 
+  unsigned int i;
+  for (i=0; i<n; i++) 
+    index[i] = (unsigned int) ((float) index[i] + (1.0F-f));
+}
+
index 36dc0cca823a5c296ce72a421bb2bf820cd61f66..9185c7eeb5299cbed35a83df814635328ec08a3b 100644 (file)
@@ -104,11 +104,11 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  {target {vect_intfloat_cvt && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  {target {{! { vect_intfloat_cvt}} && { ! {vect_int_mult}}} } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_intfloat_cvt && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  {target {{! { vect_intfloat_cvt}} && { ! {vect_int_mult}}} } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  {target {vect_uintfloat_cvt && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  {target {{! { vect_uintfloat_cvt}} && { ! {vect_int_mult}}} } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  {target {{! { vect_uintfloat_cvt}} && { ! {vect_int_mult}}} } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
   
index 1e87eef43440bdcb07e7a2a22b5dcf6e0361c007..7e9c89c6b178cee84c6b08fcfa18a233f42e172b 100644 (file)
@@ -106,8 +106,8 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  { target { { vect_intfloat_cvt && vect_strided_wide } &&  vect_int_mult } } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { target { { { ! vect_intfloat_cvt } && vect_strided_wide } &&  vect_int_mult } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  { target { { vect_uintfloat_cvt && vect_strided_wide } &&  vect_int_mult } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { target { { { ! vect_uintfloat_cvt } && vect_strided_wide } &&  vect_int_mult } } } } */
 /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  {target  { ! { vect_int_mult && vect_strided_wide } } } } }  */
 /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0  "vect"  } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
index 9f7c7606b46e708932e6a82658edc9ceb066f388..5c5d133f7702c0de69bd1cef7f8c74baa7b894c8 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-require-effective-target vect_intfloat_cvt } */
+/* { dg-require-effective-target vect_uintfloat_cvt } */
 
 #include <stdarg.h>
 #include <stdio.h>
index 7ee7a0b04207829dce7f0968f44b342d664bdde9..288c748af904e234b27e4407b1b6f8da442fa31c 100644 (file)
@@ -102,11 +102,11 @@ int main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  {target {vect_intfloat_cvt && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  {target {{! { vect_intfloat_cvt}} && {! {vect_int_mult}}} } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_intfloat_cvt && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  {target {{! { vect_intfloat_cvt}} && {! {vect_int_mult}}} } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  {target {vect_uintfloat_cvt && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */
   
index a46f9b4dec473e471371667ee0cdff093fb74011..92bde7886a9b965bfe176b97988924fc195d8585 100644 (file)
@@ -1338,7 +1338,7 @@ proc check_effective_target_vect_int { } {
     return $et_vect_int_saved
 }
 
-# Return 1 if the target supports int->float conversion 
+# Return 1 if the target supports signed int->float conversion 
 #
 
 proc check_effective_target_vect_intfloat_cvt { } {
@@ -1361,7 +1361,28 @@ proc check_effective_target_vect_intfloat_cvt { } {
 }
 
 
-# Return 1 if the target supports float->int conversion
+# Return 1 if the target supports unsigned int->float conversion 
+#
+
+proc check_effective_target_vect_uintfloat_cvt { } {
+    global et_vect_uintfloat_cvt_saved
+
+    if [info exists et_vect_uintfloat_cvt_saved] {
+        verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
+    } else {
+        set et_vect_uintfloat_cvt_saved 0
+        if { ([istarget powerpc*-*-*]
+             && ![istarget powerpc-*-linux*paired*]) } {
+           set et_vect_uintfloat_cvt_saved 1
+        }
+    }
+
+    verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
+    return $et_vect_uintfloat_cvt_saved
+}
+
+
+# Return 1 if the target supports signed float->int conversion
 #
 
 proc check_effective_target_vect_floatint_cvt { } {
@@ -1383,6 +1404,26 @@ proc check_effective_target_vect_floatint_cvt { } {
     return $et_vect_floatint_cvt_saved
 }
 
+# Return 1 if the target supports unsigned float->int conversion
+#
+
+proc check_effective_target_vect_floatuint_cvt { } {
+    global et_vect_floatuint_cvt_saved
+
+    if [info exists et_vect_floatuint_cvt_saved] {
+        verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
+    } else {
+        set et_vect_floatuint_cvt_saved 0
+        if { ([istarget powerpc*-*-*]
+             && ![istarget powerpc-*-linux*paired*]) } {
+           set et_vect_floatuint_cvt_saved 1
+        }
+    }
+
+    verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
+    return $et_vect_floatuint_cvt_saved
+}
+
 # Return 1 is this is an arm target using 32-bit instructions
 proc check_effective_target_arm32 { } {
     return [check_no_compiler_messages arm32 assembly {