--- /dev/null
+#name: Test of invalid FEAT_SME_F16F16 fmla and fmls instructions.
+#as: -march=armv8-a+sme-f16f16
+#source: sme-f16f16-3-bad.s
+#error_output: sme-f16f16-3-bad.l
--- /dev/null
+.*: Assembler messages:
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.d\[w8,0,vgx3\],{ ?z30.h-z31.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[7\]'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h\[7\]'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h'
+.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0-z1 ?},z0.h\[7\]'
+.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0-z1 ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[7\]'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h\[7\]'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h'
+.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0-z1 ?},z0.h\[7\]'
+.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0-z1 ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.d\[w8,0,vgx3\],{ ?z31.h-z0.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},z15.h'
+.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z15'
+.*: Info: did you mean this\?
+.*: Info: fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h
+.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z20'
+.*: Info: did you mean this\?
+.*: Info: fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z20.h
+.*: Error: comma expected between operands at operand 3 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z31.h-z2.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},z15.h'
+.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z15'
+.*: Info: did you mean this\?
+.*: Info: fmla za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z15.h
+.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z20'
+.*: Info: did you mean this\?
+.*: Info: fmla za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z20.h
+.*: Error: comma expected between operands at operand 3 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.d\[w8,15,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 2 registers at operand 3 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: operand mismatch -- `fmla za.b\[w8,20,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Info: did you mean this\?
+.*: Info: fmla za.h\[w8, 20, vgx2\], { ?z0.h ?}, { ?z30.h ?}
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},{ ?z0.h-z3.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,15,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: operand mismatch -- `fmla za.b\[w8,20,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Info: did you mean this\?
+.*: Info: fmla za.h\[w8, 20, vgx4\], { ?z0.h ?}, { ?z30.h ?}
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.d\[w8,0,vgx3\],{ ?z30.h-z31.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[7\]'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h\[7\]'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h'
+.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0-z1 ?},z0.h\[7\]'
+.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0-z1 ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},z0.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h\[0\]'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[7\]'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h\[7\]'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h'
+.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0-z1 ?},z0.h\[7\]'
+.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0-z1 ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.d\[w8,0,vgx3\],{ ?z31.h-z0.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},z15.h'
+.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z15'
+.*: Info: did you mean this\?
+.*: Info: fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h
+.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z20'
+.*: Info: did you mean this\?
+.*: Info: fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z20.h
+.*: Error: comma expected between operands at operand 3 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z31.h-z2.h ?},z0.h'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},z15.h'
+.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z15'
+.*: Info: did you mean this\?
+.*: Info: fmls za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z15.h
+.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z20'
+.*: Info: did you mean this\?
+.*: Info: fmls za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z20.h
+.*: Error: comma expected between operands at operand 3 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.d\[w8,15,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 2 registers at operand 3 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: operand mismatch -- `fmls za.b\[w8,20,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Info: did you mean this\?
+.*: Info: fmls za.h\[w8, 20, vgx2\], { ?z0.h ?}, { ?z30.h ?}
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},{ ?z0.h-z3.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,15,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
+.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Error: operand mismatch -- `fmls za.b\[w8,20,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
+.*: Info: did you mean this\?
+.*: Info: fmls za.h\[w8, 20, vgx4\], { ?z0.h ?}, { ?z30.h ?}
--- /dev/null
+/* FMLA (multiple and indexed vector). */
+fmla za.s[w8, 0, vgx3], {z0.h - z1.h}, z0.h[0]
+fmla za.h[w14, 0, vgx3], {z10.h - z1.h}, z0.h[0]
+fmla za.h[w8, 15, vgx3], {z0.h - z1.h}, z0.h[0]
+fmla za.d[w8, 0, vgx3], {z30.h - z31.h}, z0.h[0]
+fmla za.h[w8, 0, vgx3], {z0.h - z1.h}, z15.h[0]
+fmla za.h[w8, 0, vgx3], {z0.h - z1.h}, z0.h[7]
+fmla za.h[w8, 0, vgx2], {z0.h}, z0.h[7]
+fmla za.h[w8, 0, vgx2], {z0.h}, z0.h
+fmla za.h[w8, 0, vgx2], {z0 - z1}, z0.h[7]
+fmla za.h[w8, 0, vgx2], {z0 - z1}
+
+fmla za.b[w8, 0, vgx1], {z0.h - z1.h}, z0.h[0]
+fmla za.h[w14, 0, vgx1], {z10.h - z1.h}, z0.h[0]
+fmla za.h[w8, 15, vgx1], {z0.h - z1.h}, z0.h[0]
+fmla za.h[w8, 0, vgx1], {z30.h - z31.h}, z0.h[0]
+fmla za.s[w8, 0, vgx1], {z0.h - z1.h}, z15.h[0]
+fmla za.h[w8, 0, vgx1], {z0.h - z1.h}, z0.h[7]
+fmla za.h[w8, 0, vgx4], {z0.h}, z0.h[7]
+fmla za.h[w8, 0, vgx4], {z0.h}, z0.h
+fmla za.h[w8, 0, vgx4], {z0 - z1}, z0.h[7]
+fmla za.h[w8, 0, vgx4], {z0 - z1}
+
+/* FMLA (multiple and single vector). */
+fmla za.s[w8, 0, vgx3], {z0.h - z1.h}, z0.h
+fmla za.h[w14, 0, vgx3], {z10.h - z1.h}, z0.h
+fmla za.h[w8, 15, vgx3], {z0.h - z1.h}, z0.h
+fmla za.d[w8, 0, vgx3], {z31.h - z0.h}, z0.h
+fmla za.h[w8, 0, vgx3], {z0.h - z1.h}, z15.h
+fmla za.h[w8, 0, vgx2], {z0.h}, z15.h
+fmla za.h[w8, 0, vgx2], {z0.h -z1.h}, z15
+fmla za.h[w8, 0, vgx2], {z0.h -z1.h}, z20
+fmla za.h[w8, 0, vgx2], {z0.h -z1.h}
+
+fmla za.h[w8, 0, vgx1], {z0.h - z1.h}, z0.h
+fmla za.s[w14, 0, vgx1], {z10.h - z1.h}, z0.h
+fmla za.h[w8, 15, vgx1], {z0.h - z1.h}, z0.h
+fmla za.h[w8, 0, vgx1], {z31.h - z2.h}, z0.h
+fmla za.b[w8, 0, vgx1], {z0.h - z1.h}, z15.h
+fmla za.h[w8, 0, vgx4], {z0.h}, z15.h
+fmla za.h[w8, 0, vgx4], {z0.h -z1.h}, z15
+fmla za.h[w8, 0, vgx4], {z0.h -z1.h}, z20
+fmla za.h[w8, 0, vgx4], {z0.h -z1.h}
+
+/* FMLA (multiple vectors). */
+fmla za.s[w8, 0, vgx3], {z0.h - z1.h}, {z0.h - z1.h}
+fmla za.h[w14, 0, vgx3], {z10.h - z1.h}, {z0.h - z1.h}
+fmla za.d[w8, 15, vgx3], {z0.h - z1.h}, {z0.h - z1.h}
+fmla za.h[w8, 0, vgx3], {z30.h - z31.h}, {z0.h - z1.h}
+fmla za.b[w8, 0, vgx3], {z0.h - z1.h}, {z30.h - z31.h}
+fmla za.h[w8, 0, vgx2], {z0.h}, {z30.h - z31.h}
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, {z30.h}
+fmla za.h[w8, 0, vgx2], {z0.h}, {z30.h}
+fmla za.h[w8, 0, vgx2], {z0.h}, {z30.h}
+fmla za.b[w8, 20, vgx2], {z0.h}, {z30.h}
+
+fmla za.s[w8, 0, vgx1], {z0.h - z1.h}, {z0.h - z3.h}
+fmla za.h[w14, 0, vgx1], {z10.h - z1.h}, {z0.h - z3.h}
+fmla za.s[w8, 15, vgx1], {z0.h - z1.h}, {z0.h - z3.h}
+fmla za.h[w8, 0, vgx1], {z30.h - z31.h}, {z0.h - z1.h}
+fmla za.b[w8, 0, vgx1], {z0.h - z1.h}, {z30.h - z31.h}
+fmla za.h[w8, 0, vgx4], {z0.h}, {z30.h - z31.h}
+fmla za.h[w8, 0, vgx4], {z0.h - z1.h}, {z30.h}
+fmla za.h[w8, 0, vgx4], {z0.h}, {z30.h}
+fmla za.h[w8, 0, vgx4], {z0.h}, {z30.h}
+fmla za.b[w8, 20, vgx4], {z0.h}, {z30.h}
+
+/* FMLS (multiple and indexed vector). */
+fmls za.s[w8, 0, vgx3], {z0.h - z1.h}, z0.h[0]
+fmls za.h[w14, 0, vgx3], {z10.h - z1.h}, z0.h[0]
+fmls za.h[w8, 15, vgx3], {z0.h - z1.h}, z0.h[0]
+fmls za.d[w8, 0, vgx3], {z30.h - z31.h}, z0.h[0]
+fmls za.h[w8, 0, vgx3], {z0.h - z1.h}, z15.h[0]
+fmls za.h[w8, 0, vgx3], {z0.h - z1.h}, z0.h[7]
+fmls za.h[w8, 0, vgx2], {z0.h}, z0.h[7]
+fmls za.h[w8, 0, vgx2], {z0.h}, z0.h
+fmls za.h[w8, 0, vgx2], {z0 - z1}, z0.h[7]
+fmls za.h[w8, 0, vgx2], {z0 - z1}
+
+fmls za.b[w8, 0, vgx1], {z0.h - z1.h}, z0.h[0]
+fmls za.h[w14, 0, vgx1], {z10.h - z1.h}, z0.h[0]
+fmls za.h[w8, 15, vgx1], {z0.h - z1.h}, z0.h[0]
+fmls za.h[w8, 0, vgx1], {z30.h - z31.h}, z0.h[0]
+fmls za.s[w8, 0, vgx1], {z0.h - z1.h}, z15.h[0]
+fmls za.h[w8, 0, vgx1], {z0.h - z1.h}, z0.h[7]
+fmls za.h[w8, 0, vgx4], {z0.h}, z0.h[7]
+fmls za.h[w8, 0, vgx4], {z0.h}, z0.h
+fmls za.h[w8, 0, vgx4], {z0 - z1}, z0.h[7]
+fmls za.h[w8, 0, vgx4], {z0 - z1}
+
+/* FMLS (multiple and single vector). */
+fmls za.s[w8, 0, vgx3], {z0.h - z1.h}, z0.h
+fmls za.h[w14, 0, vgx3], {z10.h - z1.h}, z0.h
+fmls za.h[w8, 15, vgx3], {z0.h - z1.h}, z0.h
+fmls za.d[w8, 0, vgx3], {z31.h - z0.h}, z0.h
+fmls za.h[w8, 0, vgx3], {z0.h - z1.h}, z15.h
+fmls za.h[w8, 0, vgx2], {z0.h}, z15.h
+fmls za.h[w8, 0, vgx2], {z0.h -z1.h}, z15
+fmls za.h[w8, 0, vgx2], {z0.h -z1.h}, z20
+fmls za.h[w8, 0, vgx2], {z0.h -z1.h}
+
+fmls za.h[w8, 0, vgx1], {z0.h - z1.h}, z0.h
+fmls za.s[w14, 0, vgx1], {z10.h - z1.h}, z0.h
+fmls za.h[w8, 15, vgx1], {z0.h - z1.h}, z0.h
+fmls za.h[w8, 0, vgx1], {z31.h - z2.h}, z0.h
+fmls za.b[w8, 0, vgx1], {z0.h - z1.h}, z15.h
+fmls za.h[w8, 0, vgx4], {z0.h}, z15.h
+fmls za.h[w8, 0, vgx4], {z0.h -z1.h}, z15
+fmls za.h[w8, 0, vgx4], {z0.h -z1.h}, z20
+fmls za.h[w8, 0, vgx4], {z0.h -z1.h}
+
+/* FMLS (multiple vectors). */
+fmls za.s[w8, 0, vgx3], {z0.h - z1.h}, {z0.h - z1.h}
+fmls za.h[w14, 0, vgx3], {z10.h - z1.h}, {z0.h - z1.h}
+fmls za.d[w8, 15, vgx3], {z0.h - z1.h}, {z0.h - z1.h}
+fmls za.h[w8, 0, vgx3], {z30.h - z31.h}, {z0.h - z1.h}
+fmls za.b[w8, 0, vgx3], {z0.h - z1.h}, {z30.h - z31.h}
+fmls za.h[w8, 0, vgx2], {z0.h}, {z30.h - z31.h}
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, {z30.h}
+fmls za.h[w8, 0, vgx2], {z0.h}, {z30.h}
+fmls za.h[w8, 0, vgx2], {z0.h}, {z30.h}
+fmls za.b[w8, 20, vgx2], {z0.h}, {z30.h}
+
+fmls za.s[w8, 0, vgx1], {z0.h - z1.h}, {z0.h - z3.h}
+fmls za.h[w14, 0, vgx1], {z10.h - z1.h}, {z0.h - z3.h}
+fmls za.s[w8, 15, vgx1], {z0.h - z1.h}, {z0.h - z3.h}
+fmls za.h[w8, 0, vgx1], {z30.h - z31.h}, {z0.h - z1.h}
+fmls za.b[w8, 0, vgx1], {z0.h - z1.h}, {z30.h - z31.h}
+fmls za.h[w8, 0, vgx4], {z0.h}, {z30.h - z31.h}
+fmls za.h[w8, 0, vgx4], {z0.h - z1.h}, {z30.h}
+fmls za.h[w8, 0, vgx4], {z0.h}, {z30.h}
+fmls za.h[w8, 0, vgx4], {z0.h}, {z30.h}
+fmls za.b[w8, 20, vgx4], {z0.h}, {z30.h}
--- /dev/null
+#name: Test of FEAT_SME_F16F16 fmla and fmls instructions.
+#as: -march=armv8-a+sme-f16f16
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+.*: c1101000 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h\[0\]
+.*: c1107000 fmla za.h\[w11, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h\[0\]
+.*: c1101007 fmla za.h\[w8, 7, vgx2\], { ?z0.h-z1.h ?}, z0.h\[0\]
+.*: c11013c0 fmla za.h\[w8, 0, vgx2\], { ?z30.h-z31.h ?}, z0.h\[0\]
+.*: c11f1000 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h\[0\]
+.*: c1101c08 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h\[7\]
+.*: c11f7fcf fmla za.h\[w11, 7, vgx2\], { ?z30.h-z31.h ?}, z15.h\[7\]
+.*: c11f37cf fmla za.h\[w9, 7, vgx2\], { ?z30.h-z31.h ?}, z15.h\[3\]
+.*: c1101c0b fmla za.h\[w8, 3, vgx2\], { ?z0.h-z1.h ?}, z0.h\[7\]
+.*: c1109000 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h\[0\]
+.*: c110f000 fmla za.h\[w11, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h\[0\]
+.*: c1109007 fmla za.h\[w8, 7, vgx4\], { ?z0.h-z3.h ?}, z0.h\[0\]
+.*: c1109380 fmla za.h\[w8, 0, vgx4\], { ?z28.h-z31.h ?}, z0.h\[0\]
+.*: c11f9000 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z15.h\[0\]
+.*: c1109c08 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h\[7\]
+.*: c11fff8f fmla za.h\[w11, 7, vgx4\], { ?z28.h-z31.h ?}, z15.h\[7\]
+.*: c11fb78f fmla za.h\[w9, 7, vgx4\], { ?z28.h-z31.h ?}, z15.h\[3\]
+.*: c1109c0b fmla za.h\[w8, 3, vgx4\], { ?z0.h-z3.h ?}, z0.h\[7\]
+.*: c1201c00 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h
+.*: c1207c00 fmla za.h\[w11, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h
+.*: c1201c07 fmla za.h\[w8, 7, vgx2\], { ?z0.h-z1.h ?}, z0.h
+.*: c1201fe0 fmla za.h\[w8, 0, vgx2\], { ?z31.h-z0.h ?}, z0.h
+.*: c12f1c00 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h
+.*: c12f7fc7 fmla za.h\[w11, 7, vgx2\], { ?z30.h-z31.h ?}, z15.h
+.*: c12f1c03 fmla za.h\[w8, 3, vgx2\], { ?z0.h-z1.h ?}, z15.h
+.*: c1301c00 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h
+.*: c1307c00 fmla za.h\[w11, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h
+.*: c1301c07 fmla za.h\[w8, 7, vgx4\], { ?z0.h-z3.h ?}, z0.h
+.*: c1301fe0 fmla za.h\[w8, 0, vgx4\], { ?z31.h-z2.h ?}, z0.h
+.*: c13f1c00 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z15.h
+.*: c13f7f87 fmla za.h\[w11, 7, vgx4\], { ?z28.h-z31.h ?}, z15.h
+.*: c13f1c03 fmla za.h\[w8, 3, vgx4\], { ?z0.h-z3.h ?}, z15.h
+.*: c1a01008 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, { ?z0.h-z1.h ?}
+.*: c1a07008 fmla za.h\[w11, 0, vgx2\], { ?z0.h-z1.h ?}, { ?z0.h-z1.h ?}
+.*: c1a0100f fmla za.h\[w8, 7, vgx2\], { ?z0.h-z1.h ?}, { ?z0.h-z1.h ?}
+.*: c1a013c8 fmla za.h\[w8, 0, vgx2\], { ?z30.h-z31.h ?}, { ?z0.h-z1.h ?}
+.*: c1be1008 fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, { ?z30.h-z31.h ?}
+.*: c1be73cf fmla za.h\[w11, 7, vgx2\], { ?z30.h-z31.h ?}, { ?z30.h-z31.h ?}
+.*: c1be100b fmla za.h\[w8, 3, vgx2\], { ?z0.h-z1.h ?}, { ?z30.h-z31.h ?}
+.*: c1a11008 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, { ?z0.h-z3.h ?}
+.*: c1a17008 fmla za.h\[w11, 0, vgx4\], { ?z0.h-z3.h ?}, { ?z0.h-z3.h ?}
+.*: c1a1100f fmla za.h\[w8, 7, vgx4\], { ?z0.h-z3.h ?}, { ?z0.h-z3.h ?}
+.*: c1a11388 fmla za.h\[w8, 0, vgx4\], { ?z28.h-z31.h ?}, { ?z0.h-z3.h ?}
+.*: c1bd1008 fmla za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, { ?z28.h-z31.h ?}
+.*: c1bd738f fmla za.h\[w11, 7, vgx4\], { ?z28.h-z31.h ?}, { ?z28.h-z31.h ?}
+.*: c1bd100b fmla za.h\[w8, 3, vgx4\], { ?z0.h-z3.h ?}, { ?z28.h-z31.h ?}
+.*: c1101010 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h\[0\]
+.*: c1107010 fmls za.h\[w11, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h\[0\]
+.*: c1101017 fmls za.h\[w8, 7, vgx2\], { ?z0.h-z1.h ?}, z0.h\[0\]
+.*: c11013d0 fmls za.h\[w8, 0, vgx2\], { ?z30.h-z31.h ?}, z0.h\[0\]
+.*: c11f1010 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h\[0\]
+.*: c1101c18 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h\[7\]
+.*: c11f7fdf fmls za.h\[w11, 7, vgx2\], { ?z30.h-z31.h ?}, z15.h\[7\]
+.*: c11f37df fmls za.h\[w9, 7, vgx2\], { ?z30.h-z31.h ?}, z15.h\[3\]
+.*: c1101c1b fmls za.h\[w8, 3, vgx2\], { ?z0.h-z1.h ?}, z0.h\[7\]
+.*: c1109010 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h\[0\]
+.*: c110f010 fmls za.h\[w11, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h\[0\]
+.*: c1109017 fmls za.h\[w8, 7, vgx4\], { ?z0.h-z3.h ?}, z0.h\[0\]
+.*: c1109390 fmls za.h\[w8, 0, vgx4\], { ?z28.h-z31.h ?}, z0.h\[0\]
+.*: c11f9010 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z15.h\[0\]
+.*: c1109c18 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h\[7\]
+.*: c11fff9f fmls za.h\[w11, 7, vgx4\], { ?z28.h-z31.h ?}, z15.h\[7\]
+.*: c11fb79f fmls za.h\[w9, 7, vgx4\], { ?z28.h-z31.h ?}, z15.h\[3\]
+.*: c1109c1b fmls za.h\[w8, 3, vgx4\], { ?z0.h-z3.h ?}, z0.h\[7\]
+.*: c1201c08 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h
+.*: c1207c08 fmls za.h\[w11, 0, vgx2\], { ?z0.h-z1.h ?}, z0.h
+.*: c1201c0f fmls za.h\[w8, 7, vgx2\], { ?z0.h-z1.h ?}, z0.h
+.*: c1201fe8 fmls za.h\[w8, 0, vgx2\], { ?z31.h-z0.h ?}, z0.h
+.*: c12f1c08 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h
+.*: c12f7fcf fmls za.h\[w11, 7, vgx2\], { ?z30.h-z31.h ?}, z15.h
+.*: c12f1c0b fmls za.h\[w8, 3, vgx2\], { ?z0.h-z1.h ?}, z15.h
+.*: c1301c08 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h
+.*: c1307c08 fmls za.h\[w11, 0, vgx4\], { ?z0.h-z3.h ?}, z0.h
+.*: c1301c0f fmls za.h\[w8, 7, vgx4\], { ?z0.h-z3.h ?}, z0.h
+.*: c1301fe8 fmls za.h\[w8, 0, vgx4\], { ?z31.h-z2.h ?}, z0.h
+.*: c13f1c08 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, z15.h
+.*: c13f7f8f fmls za.h\[w11, 7, vgx4\], { ?z28.h-z31.h ?}, z15.h
+.*: c13f1c0b fmls za.h\[w8, 3, vgx4\], { ?z0.h-z3.h ?}, z15.h
+.*: c1a01018 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, { ?z0.h-z1.h ?}
+.*: c1a07018 fmls za.h\[w11, 0, vgx2\], { ?z0.h-z1.h ?}, { ?z0.h-z1.h ?}
+.*: c1a0101f fmls za.h\[w8, 7, vgx2\], { ?z0.h-z1.h ?}, { ?z0.h-z1.h ?}
+.*: c1a013d8 fmls za.h\[w8, 0, vgx2\], { ?z30.h-z31.h ?}, { ?z0.h-z1.h ?}
+.*: c1be1018 fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, { ?z30.h-z31.h ?}
+.*: c1be73df fmls za.h\[w11, 7, vgx2\], { ?z30.h-z31.h ?}, { ?z30.h-z31.h ?}
+.*: c1be101b fmls za.h\[w8, 3, vgx2\], { ?z0.h-z1.h ?}, { ?z30.h-z31.h ?}
+.*: c1a11018 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, { ?z0.h-z3.h ?}
+.*: c1a17018 fmls za.h\[w11, 0, vgx4\], { ?z0.h-z3.h ?}, { ?z0.h-z3.h ?}
+.*: c1a1101f fmls za.h\[w8, 7, vgx4\], { ?z0.h-z3.h ?}, { ?z0.h-z3.h ?}
+.*: c1a11398 fmls za.h\[w8, 0, vgx4\], { ?z28.h-z31.h ?}, { ?z0.h-z3.h ?}
+.*: c1bd1018 fmls za.h\[w8, 0, vgx4\], { ?z0.h-z3.h ?}, { ?z28.h-z31.h ?}
+.*: c1bd739f fmls za.h\[w11, 7, vgx4\], { ?z28.h-z31.h ?}, { ?z28.h-z31.h ?}
+.*: c1bd101b fmls za.h\[w8, 3, vgx4\], { ?z0.h-z3.h ?}, { ?z28.h-z31.h ?}
--- /dev/null
+/* FMLA (multiple and indexed vector). */
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, z0.h[0]
+fmla za.h[w11, 0, vgx2], {z0.h - z1.h}, z0.h[0]
+fmla za.h[w8, 7, vgx2], {z0.h - z1.h}, z0.h[0]
+fmla za.h[w8, 0, vgx2], {z30.h - z31.h}, z0.h[0]
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, z15.h[0]
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, z0.h[7]
+fmla za.h[w11, 7, vgx2], {z30.h - z31.h}, z15.h[7]
+fmla za.h[w9, 7, vgx2], {z30.h - z31.h}, z15.h[3]
+fmla za.h[w8, 3], {z0.h - z1.h}, z0.h[7]
+
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[0]
+fmla za.h[w11, 0, vgx4], {z0.h - z3.h}, z0.h[0]
+fmla za.h[w8, 7, vgx4], {z0.h - z3.h}, z0.h[0]
+fmla za.h[w8, 0, vgx4], {z28.h - z31.h}, z0.h[0]
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z15.h[0]
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[7]
+fmla za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h[7]
+fmla za.h[w9, 7, vgx4], {z28.h - z31.h}, z15.h[3]
+fmla za.h[w8, 3], {z0.h - z3.h}, z0.h[7]
+
+/* FMLA (multiple and single vector). */
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, z0.h
+fmla za.h[w11, 0, vgx2], {z0.h - z1.h}, z0.h
+fmla za.h[w8, 7, vgx2], {z0.h - z1.h}, z0.h
+fmla za.h[w8, 0, vgx2], {z31.h - z0.h}, z0.h
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, z15.h
+fmla za.h[w11, 7, vgx2], {z30.h - z31.h}, z15.h
+fmla za.h[w8, 3], {z0.h - z1.h}, z15.h
+
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h
+fmla za.h[w11, 0, vgx4], {z0.h - z3.h}, z0.h
+fmla za.h[w8, 7, vgx4], {z0.h - z3.h}, z0.h
+fmla za.h[w8, 0, vgx4], {z31.h - z2.h}, z0.h
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z15.h
+fmla za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h
+fmla za.h[w8, 3], {z0.h - z3.h}, z15.h
+
+/* FMLA (multiple vectors). */
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, {z0.h - z1.h}
+fmla za.h[w11, 0, vgx2], {z0.h - z1.h}, {z0.h - z1.h}
+fmla za.h[w8, 7, vgx2], {z0.h - z1.h}, {z0.h - z1.h}
+fmla za.h[w8, 0, vgx2], {z30.h - z31.h}, {z0.h - z1.h}
+fmla za.h[w8, 0, vgx2], {z0.h - z1.h}, {z30.h - z31.h}
+fmla za.h[w11, 7, vgx2], {z30.h - z31.h}, {z30.h - z31.h}
+fmla za.h[w8, 3], {z0.h - z1.h}, {z30.h - z31.h}
+
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h}
+fmla za.h[w11, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h}
+fmla za.h[w8, 7, vgx4], {z0.h - z3.h}, {z0.h - z3.h}
+fmla za.h[w8, 0, vgx4], {z28.h - z31.h}, {z0.h - z3.h}
+fmla za.h[w8, 0, vgx4], {z0.h - z3.h}, {z28.h - z31.h}
+fmla za.h[w11, 7, vgx4], {z28.h - z31.h}, {z28.h - z31.h}
+fmla za.h[w8, 3], {z0.h - z3.h}, {z28.h - z31.h}
+
+/* FMLS (multiple and indexed vector). */
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, z0.h[0]
+fmls za.h[w11, 0, vgx2], {z0.h - z1.h}, z0.h[0]
+fmls za.h[w8, 7, vgx2], {z0.h - z1.h}, z0.h[0]
+fmls za.h[w8, 0, vgx2], {z30.h - z31.h}, z0.h[0]
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, z15.h[0]
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, z0.h[7]
+fmls za.h[w11, 7, vgx2], {z30.h - z31.h}, z15.h[7]
+fmls za.h[w9, 7, vgx2], {z30.h - z31.h}, z15.h[3]
+fmls za.h[w8, 3], {z0.h - z1.h}, z0.h[7]
+
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[0]
+fmls za.h[w11, 0, vgx4], {z0.h - z3.h}, z0.h[0]
+fmls za.h[w8, 7, vgx4], {z0.h - z3.h}, z0.h[0]
+fmls za.h[w8, 0, vgx4], {z28.h - z31.h}, z0.h[0]
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z15.h[0]
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[7]
+fmls za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h[7]
+fmls za.h[w9, 7, vgx4], {z28.h - z31.h}, z15.h[3]
+fmls za.h[w8, 3], {z0.h - z3.h}, z0.h[7]
+
+/* FMLS (multiple and single vector). */
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, z0.h
+fmls za.h[w11, 0, vgx2], {z0.h - z1.h}, z0.h
+fmls za.h[w8, 7, vgx2], {z0.h - z1.h}, z0.h
+fmls za.h[w8, 0, vgx2], {z31.h - z0.h}, z0.h
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, z15.h
+fmls za.h[w11, 7, vgx2], {z30.h - z31.h}, z15.h
+fmls za.h[w8, 3], {z0.h - z1.h}, z15.h
+
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h
+fmls za.h[w11, 0, vgx4], {z0.h - z3.h}, z0.h
+fmls za.h[w8, 7, vgx4], {z0.h - z3.h}, z0.h
+fmls za.h[w8, 0, vgx4], {z31.h - z2.h}, z0.h
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z15.h
+fmls za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h
+fmls za.h[w8, 3], {z0.h - z3.h}, z15.h
+
+/* FMLS (multiple vectors). */
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, {z0.h - z1.h}
+fmls za.h[w11, 0, vgx2], {z0.h - z1.h}, {z0.h - z1.h}
+fmls za.h[w8, 7, vgx2], {z0.h - z1.h}, {z0.h - z1.h}
+fmls za.h[w8, 0, vgx2], {z30.h - z31.h}, {z0.h - z1.h}
+fmls za.h[w8, 0, vgx2], {z0.h - z1.h}, {z30.h - z31.h}
+fmls za.h[w11, 7, vgx2], {z30.h - z31.h}, {z30.h - z31.h}
+fmls za.h[w8, 3], {z0.h - z1.h}, {z30.h - z31.h}
+
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h}
+fmls za.h[w11, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h}
+fmls za.h[w8, 7, vgx4], {z0.h - z3.h}, {z0.h - z3.h}
+fmls za.h[w8, 0, vgx4], {z28.h - z31.h}, {z0.h - z3.h}
+fmls za.h[w8, 0, vgx4], {z0.h - z3.h}, {z28.h - z31.h}
+fmls za.h[w11, 7, vgx4], {z28.h - z31.h}, {z28.h - z31.h}
+fmls za.h[w8, 3], {z0.h - z3.h}, {z28.h - z31.h}
10987654321098765432109876543210
x1000000x000101x00xxxxxxxxxxxxxx
luti4. */
- return 3430;
+ return 3442;
}
else
{
10987654321098765432109876543210
x1000000xx01101x00xxxxxxxxxxxxxx
luti4. */
- return 3431;
+ return 3443;
}
else
{
10987654321098765432109876543210
x1000000010011x1xxxx00xxxxxxxxxx
movt. */
- return 3432;
+ return 3444;
}
}
else
10987654321098765432109876543210
xx000000101xxxxxxxxxxxxxxxx00xxx
fmopa. */
- return 3498;
+ return 3510;
}
else
{
10987654321098765432109876543210
xx000000101xxxxxxxxxxxxxxxx01xxx
fmopa. */
- return 3497;
+ return 3509;
}
}
else
10987654321098765432109876543210
xx0000010001xxxx1xx0xxxxx1000xxx
fmlall. */
- return 3491;
+ return 3503;
}
}
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx0000010001xxxxxxx1xxxxxx00xxxx
- fdot. */
- return 3476;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xx1xxxxxx00xxxx
+ fmla. */
+ return 3327;
+ }
+ else
+ {
+ if (((word >> 6) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xx1xxxxx000xxxx
+ fmla. */
+ return 3328;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xx1xxxxx100xxxx
+ fdot. */
+ return 3488;
+ }
+ }
}
}
else
}
else
{
- if (((word >> 3) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000010000xxxxxxxxxxxxxxx101xx
- sumlall. */
- return 2848;
+ xx0000010000xxxxxxxxxxxxxxx110xx
+ umlsll. */
+ return 2906;
}
}
else
{
- if (((word >> 5) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010000xxxxxxxxxxxxxxx1x1xx
+ sumlall. */
+ return 2848;
+ }
+ }
+ else
+ {
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx0000010001xxxx0xxxxxxxxx010xxx
- umlall. */
- return 2891;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xx0xxxxxx010xxx
+ umlall. */
+ return 2891;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xx0xxxxxx010xxx
+ umlall. */
+ return 2892;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx0000010001xxxx1xxxxxxxxx010xxx
- umlall. */
- return 2892;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xx0xxxxxx011xxx
+ umlsll. */
+ return 2907;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xx0xxxxxx011xxx
+ umlsll. */
+ return 2908;
+ }
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000010001xxxx0xxxxxxxxx110xxx
- sumlall. */
- return 2849;
+ xx0000010001xxxx0xx1xxxxxx01xxxx
+ fmls. */
+ return 3333;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000010001xxxx1xxxxxxxxx110xxx
- sumlall. */
- return 2850;
+ xx0000010001xxxx1xx1xxxxxx01xxxx
+ fmls. */
+ return 3334;
}
}
}
- }
- else
- {
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx0000010000xxxxxxxxxxxxxxx11xxx
- umlsll. */
- return 2906;
- }
else
{
if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000010001xxxx0xxxxxxxxxx11xxx
- umlsll. */
- return 2907;
+ xx0000010001xxxx0xxxxxxxxx11xxxx
+ sumlall. */
+ return 2849;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000010001xxxx1xxxxxxxxxx11xxx
- umlsll. */
- return 2908;
+ xx0000010001xxxx1xxxxxxxxx11xxxx
+ sumlall. */
+ return 2850;
}
}
}
10987654321098765432109876543210
x10000011001xxxxxxx0xxxxxx100xxx
fmlall. */
- return 3490;
+ return 3502;
}
}
}
10987654321098765432109876543210
x10000011001xxxxxxx1xxxxxx10xxxx
fmlal. */
- return 3483;
+ return 3495;
}
}
}
10987654321098765432109876543210
x10000011001xxxxxxx1xxxxxx11xxxx
fmlal. */
- return 3482;
+ return 3494;
}
}
}
10987654321098765432109876543210
xx0000010100xxxxxxxxxxxxxxxx0xxx
fmlall. */
- return 3489;
+ return 3501;
}
else
{
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx111xxx
fdot. */
- return 3469;
+ return 3481;
}
else
{
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx001xxx
fdot. */
- return 3470;
+ return 3482;
}
else
{
10987654321098765432109876543210
xx0000011100xxxxxxx0xxxxxxx0xxxx
fmlal. */
- return 3481;
+ return 3493;
}
else
{
10987654321098765432109876543210
xx0000011101xxxx0xx01xxxxx00xxxx
fvdotb. */
- return 3500;
+ return 3512;
}
else
{
10987654321098765432109876543210
xx0000011101xxxxxxx0xxxxxx10xxxx
fdot. */
- return 3475;
+ return 3487;
}
}
}
10987654321098765432109876543210
xx0000011101xxxxxxx1xxxxxx10xxxx
fvdot. */
- return 3499;
+ return 3511;
}
}
}
10987654321098765432109876543210
xx000001110xxxxx0xx01xxxxxx1xxxx
fvdott. */
- return 3501;
+ return 3513;
}
else
{
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxx10000x
fmlall. */
- return 3495;
+ return 3507;
}
else
{
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxx10000x
fmlall. */
- return 3496;
+ return 3508;
}
}
}
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx00x1x
fmlall. */
- return 3493;
+ return 3505;
}
else
{
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx00x1x
fmlall. */
- return 3494;
+ return 3506;
}
}
}
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxx100xxx
fdot. */
- return 3479;
+ return 3491;
}
else
{
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxx100xxx
fdot. */
- return 3480;
+ return 3492;
}
}
}
10987654321098765432109876543210
x1000001101xxxx00xx010xxxx1000xx
fmlal. */
- return 3487;
+ return 3499;
}
else
{
10987654321098765432109876543210
x1000001101xxxx10xx010xxxx1000xx
fmlal. */
- return 3488;
+ return 3500;
}
}
}
10987654321098765432109876543210
x1000001xx10xxxx0xx010xxxxx001xx
fmlal. */
- return 3485;
+ return 3497;
}
else
{
10987654321098765432109876543210
x1000001xx11xxxx0xx010xxxxx001xx
fmlal. */
- return 3486;
+ return 3498;
}
}
}
10987654321098765432109876543210
x1000001xx11xxxx0xx001xxxxx000xx
fmlall. */
- return 3492;
+ return 3504;
}
}
else
10987654321098765432109876543210
x1000001xx11xxxx0xx011xxxxx00xxx
fmlal. */
- return 3484;
+ return 3496;
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xx0x00xx111xxxxx00xxx
- fadd. */
- return 2530;
+ x10000010x10xxxx0xx111xxxxx00xxx
+ fmla. */
+ return 3329;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xx1x00xx111xxxxx00xxx
- fadd. */
- return 3433;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x0x00xx111xxxxx00xxx
+ fadd. */
+ return 2530;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x1x00xx111xxxxx00xxx
+ fadd. */
+ return 3445;
+ }
+ }
+ else
+ {
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x0x10xx111xxxxx00xxx
+ fadd. */
+ return 2531;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x1x10xx111xxxxx00xxx
+ fadd. */
+ return 3446;
+ }
+ }
}
}
else
{
- if (((word >> 18) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xx0x10xx111xxxxx00xxx
- fadd. */
- return 2531;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xx1x10xx111xxxxx00xxx
- fadd. */
- return 3434;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxxx0xx111xxxxx00xxx
+ fmla. */
+ return 3330;
}
}
}
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxx110xxx
fdot. */
- return 3473;
+ return 3485;
}
else
{
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxx110xxx
fdot. */
- return 3474;
+ return 3486;
}
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xxxx0xx100xxxxx01xxx
- fdot. */
- return 3477;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx100xxxxx01xxx
+ fdot. */
+ return 3489;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx100xxxxx01xxx
+ fdot. */
+ return 3490;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xxxx0xx100xxxxx01xxx
- fdot. */
- return 3478;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx100xxxxx01xxx
+ fmla. */
+ return 3331;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx100xxxxx01xxx
+ fmla. */
+ return 3332;
+ }
}
}
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xx0x00xx111xxxxx01xxx
- fsub. */
- return 2598;
+ x10000010x10xxxx0xx111xxxxx01xxx
+ fmls. */
+ return 3335;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xx1x00xx111xxxxx01xxx
- fsub. */
- return 3435;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x0x00xx111xxxxx01xxx
+ fsub. */
+ return 2598;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x1x00xx111xxxxx01xxx
+ fsub. */
+ return 3447;
+ }
+ }
+ else
+ {
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x0x10xx111xxxxx01xxx
+ fsub. */
+ return 2599;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x10x1x10xx111xxxxx01xxx
+ fsub. */
+ return 3448;
+ }
+ }
}
}
else
{
- if (((word >> 18) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xx0x10xx111xxxxx01xxx
- fsub. */
- return 2599;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xx1x10xx111xxxxx01xxx
- fsub. */
- return 3436;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxxx0xx111xxxxx01xxx
+ fmls. */
+ return 3336;
}
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xxxx0xx100xxxxx11xxx
- fdot. */
- return 3471;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx100xxxxx11xxx
+ fdot. */
+ return 3483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx100xxxxx11xxx
+ fdot. */
+ return 3484;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xxxx0xx100xxxxx11xxx
- fdot. */
- return 3472;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx100xxxxx11xxx
+ fmls. */
+ return 3337;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx100xxxxx11xxx
+ fmls. */
+ return 3338;
+ }
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx101000xx1x0xxxx0
fscale. */
- return 3407;
+ return 3419;
}
}
else
10987654321098765432109876543210
x1000001x0100100111000xxxx0xxxxx
fcvt. */
- return 3404;
+ return 3416;
}
else
{
10987654321098765432109876543210
x1000001x1100100111000xxxx0xxxxx
bfcvt. */
- return 3399;
+ return 3411;
}
}
else
10987654321098765432109876543210
x1000001xx110100111000xxxx0xxxxx
fcvt. */
- return 3405;
+ return 3417;
}
}
else
10987654321098765432109876543210
x1000001xx1xx100111000xxxx1xxxxx
fcvtn. */
- return 3406;
+ return 3418;
}
}
}
10987654321098765432109876543210
x10000010010x110111000xxxxxxxxx0
f1cvt. */
- return 3400;
+ return 3412;
}
else
{
10987654321098765432109876543210
x10000011010x110111000xxxxxxxxx0
f2cvt. */
- return 3401;
+ return 3413;
}
}
else
10987654321098765432109876543210
x10000010110x110111000xxxxxxxxx0
bf1cvt. */
- return 3395;
+ return 3407;
}
else
{
10987654321098765432109876543210
x10000011110x110111000xxxxxxxxx0
bf2cvt. */
- return 3396;
+ return 3408;
}
}
}
10987654321098765432109876543210
x1000001001xxx10111000xxxxxxxxx1
f1cvtl. */
- return 3402;
+ return 3414;
}
else
{
10987654321098765432109876543210
x1000001101xxx10111000xxxxxxxxx1
f2cvtl. */
- return 3403;
+ return 3415;
}
}
else
10987654321098765432109876543210
x1000001011xxx10111000xxxxxxxxx1
bf1cvtl. */
- return 3397;
+ return 3409;
}
else
{
10987654321098765432109876543210
x1000001111xxx10111000xxxxxxxxx1
bf2cvtl. */
- return 3398;
+ return 3410;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1x1100xx100xxxx0
fscale. */
- return 3409;
+ return 3421;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1x1010xx100xxxx0
fscale. */
- return 3408;
+ return 3420;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1110xx100xxxx0
fscale. */
- return 3410;
+ return 3422;
}
}
}
10987654321098765432109876543210
x0x11010000xxxxxxx1xxxxxxxxxxxxx
addpt. */
- return 3411;
+ return 3423;
}
else
{
10987654321098765432109876543210
x1x11010000xxxxxxx1xxxxxxxxxxxxx
subpt. */
- return 3412;
+ return 3424;
}
}
}
10987654321098765432109876543210
xxxx1011x11xxxxx0xxxxxxxxxxxxxxx
maddpt. */
- return 3413;
+ return 3425;
}
else
{
10987654321098765432109876543210
xxxx1011x11xxxxx1xxxxxxxxxxxxxxx
msubpt. */
- return 3414;
+ return 3426;
}
}
}
10987654321098765432109876543210
000001x0xx000100000xxxxxxxxxxxxx
addpt. */
- return 3415;
+ return 3427;
}
else
{
10987654321098765432109876543210
000001x0xx000101000xxxxxxxxxxxxx
subpt. */
- return 3417;
+ return 3429;
}
else
{
10987654321098765432109876543210
000001x0xx1xxxxx000010xxxxxxxxxx
addpt. */
- return 3416;
+ return 3428;
}
else
{
10987654321098765432109876543210
000001x0xx1xxxxx000011xxxxxxxxxx
subpt. */
- return 3418;
+ return 3430;
}
else
{
10987654321098765432109876543210
010001x0xx0xxxxx110100xxxxxxxxxx
mlapt. */
- return 3420;
+ return 3432;
}
}
else
10987654321098765432109876543210
010001x0xx0xxxxx110110xxxxxxxxxx
madpt. */
- return 3419;
+ return 3431;
}
}
}
10987654321098765432109876543210
000001x0xx00x100001xxxxxxxxxxxxx
smaxqv. */
- return 3329;
+ return 3341;
}
else
{
10987654321098765432109876543210
000001x0xx01x100001xxxxxxxxxxxxx
orqv. */
- return 3340;
+ return 3352;
}
}
else
10987654321098765432109876543210
000001x0xx0x0101001xxxxxxxxxxxxx
addqv. */
- return 3327;
+ return 3339;
}
else
{
10987654321098765432109876543210
000001x0xx001101001xxxxxxxxxxxxx
umaxqv. */
- return 3331;
+ return 3343;
}
else
{
10987654321098765432109876543210
000001x0xx011101001xxxxxxxxxxxxx
eorqv. */
- return 3333;
+ return 3345;
}
}
}
10987654321098765432109876543210
000001x0xx00x110001xxxxxxxxxxxxx
sminqv. */
- return 3330;
+ return 3342;
}
else
{
10987654321098765432109876543210
000001x0xx01x110001xxxxxxxxxxxxx
andqv. */
- return 3328;
+ return 3340;
}
}
}
10987654321098765432109876543210
000001x0xx0xx111001xxxxxxxxxxxxx
uminqv. */
- return 3332;
+ return 3344;
}
}
}
10987654321098765432109876543210
110001x0x00xxxxx101xxxxxxxxxxxxx
ld1q. */
- return 3356;
+ return 3368;
}
else
{
10987654321098765432109876543210
010001x0xx0xxxxx111x00xxxxxxxxxx
zipq1. */
- return 3346;
+ return 3358;
}
else
{
10987654321098765432109876543210
010001x0xx0xxxxx111010xxxxxxxxxx
uzpq1. */
- return 3344;
+ return 3356;
}
else
{
10987654321098765432109876543210
010001x0xx0xxxxx111110xxxxxxxxxx
tblq. */
- return 3341;
+ return 3353;
}
}
}
10987654321098765432109876543210
010001x0xx0xxxxx111x01xxxxxxxxxx
zipq2. */
- return 3347;
+ return 3359;
}
else
{
10987654321098765432109876543210
010001x0xx0xxxxx111x11xxxxxxxxxx
uzpq2. */
- return 3345;
+ return 3357;
}
}
}
10987654321098765432109876543210
111001x0x00xxxxx000xxxxxxxxxxxxx
st3q. */
- return 3365;
+ return 3377;
}
else
{
10987654321098765432109876543210
111001x0010xxxxx000xxxxxxxxxxxxx
st2q. */
- return 3364;
+ return 3376;
}
else
{
10987654321098765432109876543210
111001x0110xxxxx000xxxxxxxxxxxxx
st4q. */
- return 3366;
+ return 3378;
}
}
}
10987654321098765432109876543210
011001x0xx0x0000101xxxxxxxxxxxxx
faddqv. */
- return 3334;
+ return 3346;
}
else
{
10987654321098765432109876543210
011001x0xx0xx100101xxxxxxxxxxxxx
fmaxnmqv. */
- return 3335;
+ return 3347;
}
}
else
10987654321098765432109876543210
011001x0xx0xx110101xxxxxxxxxxxxx
fmaxqv. */
- return 3336;
+ return 3348;
}
}
}
10987654321098765432109876543210
011001x0xx0xx101101xxxxxxxxxxxxx
fminnmqv. */
- return 3337;
+ return 3349;
}
}
else
10987654321098765432109876543210
011001x0xx0xx111101xxxxxxxxxxxxx
fminqv. */
- return 3338;
+ return 3350;
}
}
}
10987654321098765432109876543210
101001x0xx01xxxx111xxxxxxxxxxxxx
ld2q. */
- return 3357;
+ return 3369;
}
}
}
10987654321098765432109876543210
101001x0xx1xxxxx100xxxxxxxxxxxxx
ld2q. */
- return 3360;
+ return 3372;
}
}
else
10987654321098765432109876543210
111001x00x1xxxxx000xxxxxxxxxxxxx
st2q. */
- return 3367;
+ return 3379;
}
}
else
10987654321098765432109876543210
111001x0101xxxxx000xxxxxxxxxxxxx
st3q. */
- return 3368;
+ return 3380;
}
}
else
10987654321098765432109876543210
111001x0111xxxxx000xxxxxxxxxxxxx
st4q. */
- return 3369;
+ return 3381;
}
}
}
10987654321098765432109876543210
011001x0001xxxxx0100x1xxxxxxxxxx
fdot. */
- return 3456;
+ return 3468;
}
}
else
10987654321098765432109876543210
011001x0001xxxxx0101xxxxxxxxxxxx
fmlalb. */
- return 3458;
+ return 3470;
}
}
else
10987654321098765432109876543210
011001x0101xxxxx0101xxxxxxxxxxxx
fmlalt. */
- return 3468;
+ return 3480;
}
}
else
10987654321098765432109876543210
011001x0011xxxxx010xx1xxxxxxxxxx
fdot. */
- return 3454;
+ return 3466;
}
}
else
10987654321098765432109876543210
x11001x0001xxxxx100010xxxxxxxxxx
fmlallbb. */
- return 3459;
+ return 3471;
}
}
else
10987654321098765432109876543210
x11001x0001xxxxx1000x1xxxxxxxxxx
fdot. */
- return 3455;
+ return 3467;
}
}
else
10987654321098765432109876543210
x11001x0001xxxxx1100xxxxxxxxxxxx
fmlallbb. */
- return 3460;
+ return 3472;
}
}
else
10987654321098765432109876543210
x11001x0001xxxxx1x01xxxxxxxxxxxx
fmlallbt. */
- return 3461;
+ return 3473;
}
}
else
10987654321098765432109876543210
011001x0101xxxxx100010xxxxxxxxxx
fmlalb. */
- return 3457;
+ return 3469;
}
}
else
10987654321098765432109876543210
011001x0101xxxxx1100xxxxxxxxxxxx
fmlalltb. */
- return 3464;
+ return 3476;
}
}
else
10987654321098765432109876543210
011001x0101xxxxx1x01xxxxxxxxxxxx
fmlalt. */
- return 3467;
+ return 3479;
}
}
else
10987654321098765432109876543210
x11001x0011xxxxx100xx1xxxxxxxxxx
fdot. */
- return 3453;
+ return 3465;
}
}
else
10987654321098765432109876543210
x11001x0011xxxxx110xxxxxxxxxxxxx
fmlallbt. */
- return 3462;
+ return 3474;
}
}
else
10987654321098765432109876543210
011001x0111xxxxx110xxxxxxxxxxxxx
fmlalltt. */
- return 3466;
+ return 3478;
}
}
else
10987654321098765432109876543210
111001x0xx1xxxxx001xxxxxxxxxxxxx
st1q. */
- return 3363;
+ return 3375;
}
}
else
10987654321098765432109876543210
x11001x0001xxxxx1010xxxxxxxxxxxx
fmlalltb. */
- return 3463;
+ return 3475;
}
else
{
10987654321098765432109876543210
x11001x0001xxxxx1011xxxxxxxxxxxx
fmlalltt. */
- return 3465;
+ return 3477;
}
}
else
10987654321098765432109876543210
000001x1001010x0001110xxxxxxxxxx
pmov. */
- return 3348;
+ return 3360;
}
else
{
10987654321098765432109876543210
000001x1001011x0001110xxxxxxxxxx
pmov. */
- return 3349;
+ return 3361;
}
}
else
10987654321098765432109876543210
000001x101101xx0001110xxxxxxxxxx
pmov. */
- return 3350;
+ return 3362;
}
}
else
10987654321098765432109876543210
000001x11x101xx0001110xxxxxxxxxx
pmov. */
- return 3351;
+ return 3363;
}
}
else
10987654321098765432109876543210
000001x1001x10x1001110xxxxxxxxxx
pmov. */
- return 3352;
+ return 3364;
}
else
{
10987654321098765432109876543210
000001x1001x11x1001110xxxxxxxxxx
pmov. */
- return 3353;
+ return 3365;
}
}
else
10987654321098765432109876543210
000001x1011x1xx1001110xxxxxxxxxx
pmov. */
- return 3354;
+ return 3366;
}
}
else
10987654321098765432109876543210
000001x11x1x1xx1001110xxxxxxxxxx
pmov. */
- return 3355;
+ return 3367;
}
}
}
10987654321098765432109876543210
000001x1x01xxxxx001001xxxxxxxxxx
dupq. */
- return 3339;
+ return 3351;
}
else
{
10987654321098765432109876543210
000001x1x11xxxxx001001xxxxxxxxxx
extq. */
- return 3343;
+ return 3355;
}
}
else
10987654321098765432109876543210
000001x1xx1xxxxx001101xxxxxxxxxx
tbxq. */
- return 3342;
+ return 3354;
}
}
else
10987654321098765432109876543210
010001x1xx1xxxxx101100xxxxxxxxxx
luti2. */
- return 3425;
+ return 3437;
}
}
else
10987654321098765432109876543210
010001x1xx1xxxxx101x10xxxxxxxxxx
luti2. */
- return 3426;
+ return 3438;
}
}
else
10987654321098765432109876543210
010001x1xx1xxxxx101001xxxxxxxxxx
luti4. */
- return 3427;
+ return 3439;
}
else
{
10987654321098765432109876543210
010001x1xx1xxxxx101101xxxxxxxxxx
luti4. */
- return 3428;
+ return 3440;
}
}
else
10987654321098765432109876543210
010001x1xx1xxxxx101x11xxxxxxxxxx
luti4. */
- return 3429;
+ return 3441;
}
}
}
10987654321098765432109876543210
011001x1xx001000001x00xxxxxxxxxx
f1cvt. */
- return 3387;
+ return 3399;
}
else
{
10987654321098765432109876543210
011001x1xx001000001x10xxxxxxxxxx
bf1cvt. */
- return 3383;
+ return 3395;
}
}
else
10987654321098765432109876543210
011001x1xx001000001x01xxxxxxxxxx
f2cvt. */
- return 3388;
+ return 3400;
}
else
{
10987654321098765432109876543210
011001x1xx001000001x11xxxxxxxxxx
bf2cvt. */
- return 3384;
+ return 3396;
}
}
}
10987654321098765432109876543210
011001x1xx0x1010001x00xxxxxxxxxx
fcvtn. */
- return 3392;
+ return 3404;
}
else
{
10987654321098765432109876543210
011001x1xx0x1010001x10xxxxxxxxxx
bfcvtn. */
- return 3391;
+ return 3403;
}
}
else
10987654321098765432109876543210
011001x1xx0x1010001x01xxxxxxxxxx
fcvtnb. */
- return 3393;
+ return 3405;
}
else
{
10987654321098765432109876543210
011001x1xx0x1010001x11xxxxxxxxxx
fcvtnt. */
- return 3394;
+ return 3406;
}
}
}
10987654321098765432109876543210
011001x1xx0x1001001x00xxxxxxxxxx
f1cvtlt. */
- return 3389;
+ return 3401;
}
else
{
10987654321098765432109876543210
011001x1xx0x1001001x10xxxxxxxxxx
bf1cvtlt. */
- return 3385;
+ return 3397;
}
}
else
10987654321098765432109876543210
011001x1xx0x1001001x01xxxxxxxxxx
f2cvtlt. */
- return 3390;
+ return 3402;
}
else
{
10987654321098765432109876543210
011001x1xx0x1001001x11xxxxxxxxxx
bf2cvtlt. */
- return 3386;
+ return 3398;
}
}
}
10987654321098765432109876543210
101001x10x01xxxx111xxxxxxxxxxxxx
ld3q. */
- return 3358;
+ return 3370;
}
else
{
10987654321098765432109876543210
101001x11x01xxxx111xxxxxxxxxxxxx
ld4q. */
- return 3359;
+ return 3371;
}
}
}
10987654321098765432109876543210
101001x10x1xxxxx100xxxxxxxxxxxxx
ld3q. */
- return 3361;
+ return 3373;
}
else
{
10987654321098765432109876543210
101001x11x1xxxxx100xxxxxxxxxxxxx
ld4q. */
- return 3362;
+ return 3374;
}
}
else
10987654321098765432109876543210
0x001110100xxxxxxxx100xxxxxxxxxx
luti2. */
- return 3421;
+ return 3433;
}
}
}
10987654321098765432109876543210
0x001110010xxxxxxxx000xxxxxxxxxx
luti4. */
- return 3423;
+ return 3435;
}
else
{
10987654321098765432109876543210
0x001110010xxxxxxxx100xxxxxxxxxx
luti4. */
- return 3424;
+ return 3436;
}
}
else
10987654321098765432109876543210
0x001110110xxxxxxxxx00xxxxxxxxxx
luti2. */
- return 3422;
+ return 3434;
}
}
}
10987654321098765432109876543210
00001110x00xxxxxx10001xxxxxxxxxx
fmlallbb. */
- return 3445;
+ return 3457;
}
else
{
10987654321098765432109876543210
01001110x00xxxxxx10001xxxxxxxxxx
fmlalltb. */
- return 3447;
+ return 3459;
}
}
else
10987654321098765432109876543210
00001110x10xxxxxx10001xxxxxxxxxx
fmlallbt. */
- return 3446;
+ return 3458;
}
else
{
10987654321098765432109876543210
01001110x10xxxxxx10001xxxxxxxxxx
fmlalltt. */
- return 3448;
+ return 3460;
}
}
}
10987654321098765432109876543210
00001110x00xxxxxx11101xxxxxxxxxx
fcvtn. */
- return 3378;
+ return 3390;
}
else
{
10987654321098765432109876543210
01001110x00xxxxxx11101xxxxxxxxxx
fcvtn2. */
- return 3379;
+ return 3391;
}
}
else
10987654321098765432109876543210
0x001110x10xxxxxx11101xxxxxxxxxx
fcvtn. */
- return 3380;
+ return 3392;
}
}
}
10987654321098765432109876543210
0x001110x00xxxxxx11111xxxxxxxxxx
fdot. */
- return 3437;
+ return 3449;
}
else
{
10987654321098765432109876543210
0x001110010xxxxxx11111xxxxxxxxxx
fdot. */
- return 3439;
+ return 3451;
}
else
{
10987654321098765432109876543210
00001110110xxxxxx11111xxxxxxxxxx
fmlalb. */
- return 3441;
+ return 3453;
}
else
{
10987654321098765432109876543210
01001110110xxxxxx11111xxxxxxxxxx
fmlalt. */
- return 3442;
+ return 3454;
}
}
}
10987654321098765432109876543210
xx101110110xxxxx0x1111xxxxxxxxxx
fscale. */
- return 3381;
+ return 3393;
}
}
}
10987654321098765432109876543210
x0101110001xxxx1011110xxxxxxxxxx
f1cvtl. */
- return 3374;
+ return 3386;
}
else
{
10987654321098765432109876543210
x1101110001xxxx1011110xxxxxxxxxx
f1cvtl2. */
- return 3375;
+ return 3387;
}
}
else
10987654321098765432109876543210
x0101110101xxxx1011110xxxxxxxxxx
bf1cvtl. */
- return 3370;
+ return 3382;
}
else
{
10987654321098765432109876543210
x1101110101xxxx1011110xxxxxxxxxx
bf1cvtl2. */
- return 3371;
+ return 3383;
}
}
}
10987654321098765432109876543210
x0101110011xxxx1011110xxxxxxxxxx
f2cvtl. */
- return 3376;
+ return 3388;
}
else
{
10987654321098765432109876543210
x1101110011xxxx1011110xxxxxxxxxx
f2cvtl2. */
- return 3377;
+ return 3389;
}
}
else
10987654321098765432109876543210
x0101110111xxxx1011110xxxxxxxxxx
bf2cvtl. */
- return 3372;
+ return 3384;
}
else
{
10987654321098765432109876543210
x1101110111xxxx1011110xxxxxxxxxx
bf2cvtl2. */
- return 3373;
+ return 3385;
}
}
}
10987654321098765432109876543210
xx1011101x1xxxxx111111xxxxxxxxxx
fscale. */
- return 3382;
+ return 3394;
}
}
}
10987654321098765432109876543210
xx00111100xxxxxx0000x0xxxxxxxxxx
fdot. */
- return 3438;
+ return 3450;
}
else
{
10987654321098765432109876543210
xx00111101xxxxxx0000x0xxxxxxxxxx
fdot. */
- return 3440;
+ return 3452;
}
else
{
10987654321098765432109876543210
x000111111xxxxxx0000x0xxxxxxxxxx
fmlalb. */
- return 3443;
+ return 3455;
}
else
{
10987654321098765432109876543210
x100111111xxxxxx0000x0xxxxxxxxxx
fmlalt. */
- return 3444;
+ return 3456;
}
}
}
10987654321098765432109876543210
x010111100xxxxxx1000x0xxxxxxxxxx
fmlallbb. */
- return 3449;
+ return 3461;
}
else
{
10987654321098765432109876543210
x110111100xxxxxx1000x0xxxxxxxxxx
fmlalltb. */
- return 3451;
+ return 3463;
}
}
else
10987654321098765432109876543210
x0101111x1xxxxxx1000x0xxxxxxxxxx
fmlallbt. */
- return 3450;
+ return 3462;
}
else
{
10987654321098765432109876543210
x1101111x1xxxxxx1000x0xxxxxxxxxx
fmlalltt. */
- return 3452;
+ return 3464;
}
}
}
/* SME2.1 half-precision floating-point instructions. */
SME_F16F16_INSN("fmopa", 0x81800008, 0xffe0001e, sme_misc, 0, OP5 (SME_ZAda_1b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_HMMHH, 0, 0),
SME_F16F16_INSN("fmops", 0x81800018, 0xffe0001e, sme_misc, 0, OP5 (SME_ZAda_1b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_HMMHH, 0, 0),
+ SME_F16F16_INSN("fmla", 0xc1101000, 0xfff09030, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX3_3), OP_SVE_HHH, F_OD(2), 0),
+ SME_F16F16_INSN("fmla", 0xc1109000, 0xfff09070, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX3_3), OP_SVE_HHH, F_OD(4), 0),
+ SME_F16F16_INSN("fmla", 0xc1201c00, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_HHH, F_OD (2), 0),
+ SME_F16F16_INSN("fmla", 0xc1301c00, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_HHH, F_OD (4), 0),
+ SME_F16F16_INSN("fmla", 0xc1a01008, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_HHH, F_OD (2), 0),
+ SME_F16F16_INSN("fmla", 0xc1a11008, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_HHH, F_OD (4), 0),
+ SME_F16F16_INSN("fmls", 0xc1101010, 0xfff09030, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX3_3), OP_SVE_HHH, F_OD(2), 0),
+ SME_F16F16_INSN("fmls", 0xc1109010, 0xfff09070, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX3_3), OP_SVE_HHH, F_OD(4), 0),
+ SME_F16F16_INSN("fmls", 0xc1201c08, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_HHH, F_OD (2), 0),
+ SME_F16F16_INSN("fmls", 0xc1301c08, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_HHH, F_OD (4), 0),
+ SME_F16F16_INSN("fmls", 0xc1a01018, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_HHH, F_OD (2), 0),
+ SME_F16F16_INSN("fmls", 0xc1a11018, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_HHH, F_OD (4), 0),
/* SVE2p1 Instructions. */
SVE2p1_INSN("addqv",0x04052000, 0xff3fe000, sve2_urqvs, 0, OP3 (Vd, SVE_Pg3, SVE_Zn), OP_SVE_vUS_BHSD_BHSD, F_OPD_SIZE, 0),
projects / thirdparty / binutils-gdb.git / commitdiff
