ice: Introduce ice_get_phy_model() wrapper

Introduce ice_get_phy_model() to improve code readability

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>

diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h
index d6f80da30decf48588ee113cd31be380d7d19473..558cda577191d6b64ecbdd82fef48b197a2fbf47 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice.h
+++ b/drivers/net/ethernet/intel/ice/ice.h
@@ -1047,5 +1047,10 @@ static inline void ice_clear_rdma_cap(struct ice_pf *pf)
        clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
 }
 
+static inline enum ice_phy_model ice_get_phy_model(const struct ice_hw *hw)
+{
+       return hw->ptp.phy_model;
+}
+
 extern const struct xdp_metadata_ops ice_xdp_md_ops;
 #endif /* _ICE_H_ */

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
index 382aa8d9a23a3f0cb79bc47c40c765b64fea770e..d3cd7e663d38e4e00aec6cf6d3f21aa47c6dbf17 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_ptp.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
@@ -1285,7 +1285,7 @@ ice_ptp_port_phy_stop(struct ice_ptp_port *ptp_port)
 
        mutex_lock(&ptp_port->ps_lock);
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                err = ice_stop_phy_timer_eth56g(hw, port, true);
                break;
@@ -1331,7 +1331,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)
 
        mutex_lock(&ptp_port->ps_lock);
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                err = ice_start_phy_timer_eth56g(hw, port);
                break;
@@ -1402,8 +1402,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
        /* Skip HW writes if reset is in progress */
        if (pf->hw.reset_ongoing)
                return;
-
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_E810:
                /* Do not reconfigure E810 PHY */
                return;
@@ -1436,7 +1435,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)
 
        ice_ptp_reset_ts_memory(hw);
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G: {
                int port;
 
@@ -1475,7 +1474,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)
        case ICE_PHY_UNSUP:
        default:
                dev_warn(dev, "%s: Unexpected PHY model %d\n", __func__,
-                        hw->ptp.phy_model);
+                        ice_get_phy_model(hw));
                return -EOPNOTSUPP;
        }
 }
@@ -2037,7 +2036,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
        /* For Vernier mode on E82X, we need to recalibrate after new settime.
         * Start with marking timestamps as invalid.
         */
-       if (hw->ptp.phy_model == ICE_PHY_E82X) {
+       if (ice_get_phy_model(hw) == ICE_PHY_E82X) {
                err = ice_ptp_clear_phy_offset_ready_e82x(hw);
                if (err)
                        dev_warn(ice_pf_to_dev(pf), "Failed to mark timestamps as invalid before settime\n");
@@ -2061,7 +2060,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
        ice_ptp_enable_all_perout(pf);
 
        /* Recalibrate and re-enable timestamp blocks for E822/E823 */
-       if (hw->ptp.phy_model == ICE_PHY_E82X)
+       if (ice_get_phy_model(hw) == ICE_PHY_E82X)
                ice_ptp_restart_all_phy(pf);
 exit:
        if (err) {
@@ -3242,7 +3241,7 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port)
 
        mutex_init(&ptp_port->ps_lock);
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                return ice_ptp_init_tx_eth56g(pf, &ptp_port->tx,
                                              ptp_port->port_num);
@@ -3340,7 +3339,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf)
  */
 static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf)
 {
-       switch (pf->hw.ptp.phy_model) {
+       switch (ice_get_phy_model(&pf->hw)) {
        case ICE_PHY_E82X:
                /* E822 based PHY has the clock owner process the interrupt
                 * for all ports.

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 6dff422b7f4e8e2f56b2279f392122744e25b17a..da88c6ccfaeb5d76947595232cf7740b10bc4f97 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -829,7 +829,7 @@ static u32 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw *hw,
        /* Certain hardware families share the same register values for the
         * port register and source timer register.
         */
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_E810:
                return ice_ptp_tmr_cmd_to_src_reg(hw, cmd) & TS_CMD_MASK_E810;
        default:
@@ -5502,7 +5502,7 @@ void ice_ptp_init_hw(struct ice_hw *hw)
 static int ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port,
                                  enum ice_ptp_tmr_cmd cmd)
 {
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                return ice_ptp_write_port_cmd_eth56g(hw, port, cmd);
        case ICE_PHY_E82X:
@@ -5567,7 +5567,7 @@ static int ice_ptp_port_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
        u32 port;
 
        /* PHY models which can program all ports simultaneously */
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_E810:
                return ice_ptp_port_cmd_e810(hw, cmd);
        default:
@@ -5646,7 +5646,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
 
        /* PHY timers */
        /* Fill Rx and Tx ports and send msg to PHY */
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                err = ice_ptp_prep_phy_time_eth56g(hw,
                                                   (u32)(time & 0xFFFFFFFF));
@@ -5692,7 +5692,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
        wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval));
        wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval));
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                err = ice_ptp_prep_phy_incval_eth56g(hw, incval);
                break;
@@ -5761,7 +5761,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
        wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0);
        wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj);
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                err = ice_ptp_prep_phy_adj_eth56g(hw, adj);
                break;
@@ -5794,7 +5794,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
  */
 int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
 {
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                return ice_read_ptp_tstamp_eth56g(hw, block, idx, tstamp);
        case ICE_PHY_E810:
@@ -5824,7 +5824,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
  */
 int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx)
 {
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                return ice_clear_ptp_tstamp_eth56g(hw, block, idx);
        case ICE_PHY_E810:
@@ -5887,7 +5887,7 @@ static int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx)
  */
 void ice_ptp_reset_ts_memory(struct ice_hw *hw)
 {
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                ice_ptp_reset_ts_memory_eth56g(hw);
                break;
@@ -5916,7 +5916,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
        /* Clear event err indications for auxiliary pins */
        (void)rd32(hw, GLTSYN_STAT(src_idx));
 
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                return ice_ptp_init_phc_eth56g(hw);
        case ICE_PHY_E810:
@@ -5941,7 +5941,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
  */
 int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready)
 {
-       switch (hw->ptp.phy_model) {
+       switch (ice_get_phy_model(hw)) {
        case ICE_PHY_ETH56G:
                return ice_get_phy_tx_tstamp_ready_eth56g(hw, block,
                                                          tstamp_ready);