--- /dev/null
+From 72f79f9e35bd3f78ee8853f2fcacaa197d23ebac Mon Sep 17 00:00:00 2001
+From: Suman Tripathi <stripathi@apm.com>
+Date: Fri, 8 Aug 2014 21:44:25 +0530
+Subject: ahci_xgene: Removing NCQ support from the APM X-Gene SoC AHCI SATA Host Controller driver.
+
+From: Suman Tripathi <stripathi@apm.com>
+
+commit 72f79f9e35bd3f78ee8853f2fcacaa197d23ebac upstream.
+
+This patch removes the NCQ support from the APM X-Gene SoC AHCI
+Host Controller driver as it doesn't support it.
+
+Signed-off-by: Loc Ho <lho@apm.com>
+Signed-off-by: Suman Tripathi <stripathi@apm.com>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+[bwh: Backported to 3.16: host flags are passed to ahci_platform_init_host()]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ata/ahci_xgene.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/ata/ahci_xgene.c
++++ b/drivers/ata/ahci_xgene.c
+@@ -337,7 +337,7 @@ static struct ata_port_operations xgene_
+ };
+
+ static const struct ata_port_info xgene_ahci_port_info = {
+- .flags = AHCI_FLAG_COMMON | ATA_FLAG_NCQ,
++ .flags = AHCI_FLAG_COMMON,
+ .pio_mask = ATA_PIO4,
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &xgene_ahci_ops,
+@@ -484,7 +484,7 @@ static int xgene_ahci_probe(struct platf
+ goto disable_resources;
+ }
+
+- hflags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_YES_NCQ;
++ hflags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_NCQ;
+
+ rc = ahci_platform_init_host(pdev, hpriv, &xgene_ahci_port_info,
+ hflags, 0, 0);
--- /dev/null
+From 6098b45b32e6baeacc04790773ced9340601d511 Mon Sep 17 00:00:00 2001
+From: Gu Zheng <guz.fnst@cn.fujitsu.com>
+Date: Wed, 3 Sep 2014 17:45:44 +0800
+Subject: aio: block exit_aio() until all context requests are completed
+
+From: Gu Zheng <guz.fnst@cn.fujitsu.com>
+
+commit 6098b45b32e6baeacc04790773ced9340601d511 upstream.
+
+It seems that exit_aio() also needs to wait for all iocbs to complete (like
+io_destroy), but we missed the wait step in current implemention, so fix
+it in the same way as we did in io_destroy.
+
+Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
+Signed-off-by: Benjamin LaHaise <bcrl@kvack.org>
+[bwh: Backported to 3.16: adjust context]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+
+---
+ fs/aio.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/fs/aio.c
++++ b/fs/aio.c
+@@ -797,6 +797,9 @@ void exit_aio(struct mm_struct *mm)
+ unsigned i = 0;
+
+ while (1) {
++ struct completion requests_done =
++ COMPLETION_INITIALIZER_ONSTACK(requests_done);
++
+ rcu_read_lock();
+ table = rcu_dereference(mm->ioctx_table);
+
+@@ -824,7 +827,10 @@ void exit_aio(struct mm_struct *mm)
+ */
+ ctx->mmap_size = 0;
+
+- kill_ioctx(mm, ctx, NULL);
++ kill_ioctx(mm, ctx, &requests_done);
++
++ /* Wait until all IO for the context are done. */
++ wait_for_completion(&requests_done);
+ }
+ }
+
--- /dev/null
+From 067bb1741c27c8d3b74ac98c0b8fc12b31e67005 Mon Sep 17 00:00:00 2001
+From: Tero Kristo <t-kristo@ti.com>
+Date: Thu, 21 Aug 2014 16:47:45 +0300
+Subject: clk: prevent erronous parsing of children during rate change
+
+From: Tero Kristo <t-kristo@ti.com>
+
+commit 067bb1741c27c8d3b74ac98c0b8fc12b31e67005 upstream.
+
+In some cases, clocks can switch their parent with clk_set_rate, for
+example clk_mux can do this in some cases. Current implementation of
+clk_change_rate uses un-safe list iteration on the clock children, which
+will cause wrong clocks to be parsed in case any of the clock children
+change their parents during the change rate operation. Fixed by using
+the safe list iterator instead.
+
+The problem was detected due to some divide by zero errors generated
+by clock init on dra7-evm board, see discussion under
+http://article.gmane.org/gmane.linux.ports.arm.kernel/349180 for details.
+
+Fixes: 71472c0c06cf ("clk: add support for clock reparent on set_rate")
+Signed-off-by: Tero Kristo <t-kristo@ti.com>
+Reported-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/clk.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/clk.c
++++ b/drivers/clk/clk.c
+@@ -1495,6 +1495,7 @@ static struct clk *clk_propagate_rate_ch
+ static void clk_change_rate(struct clk *clk)
+ {
+ struct clk *child;
++ struct hlist_node *tmp;
+ unsigned long old_rate;
+ unsigned long best_parent_rate = 0;
+ bool skip_set_rate = false;
+@@ -1530,7 +1531,11 @@ static void clk_change_rate(struct clk *
+ if (clk->notifier_count && old_rate != clk->rate)
+ __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate);
+
+- hlist_for_each_entry(child, &clk->children, child_node) {
++ /*
++ * Use safe iteration, as change_rate can actually swap parents
++ * for certain clock types.
++ */
++ hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) {
+ /* Skip children who will be reparented to another clock */
+ if (child->new_parent && child->new_parent != clk)
+ continue;
--- /dev/null
+From ff20783f7b9f35b29e768d8ecc7076c1ca1a60ca Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Tue, 8 Jul 2014 18:36:06 -0700
+Subject: clk: qcom: Fix MN frequency tables, parent map, and jpegd
+
+From: Stephen Boyd <sboyd@codeaurora.org>
+
+commit ff20783f7b9f35b29e768d8ecc7076c1ca1a60ca upstream.
+
+Clocks that don't have a pre-divider don't list any pre-divider
+in their frequency tables, but their tables are initialized using
+aggregate initializers. Use tagged initializers so we properly
+assign the m and n values for each frequency. Furthermore, the
+mmcc_pxo_pll8_pll2_pll3 array improperly mapped the second
+element to pll2 instead of pll8, causing the clock driver to
+recalculate the wrong rate for any clocks using this array along
+with a rate that uses pll2. Plus the .num_parents field is 3
+instead of 4 so you can't even switch the parent to pll3. Finally
+I noticed that the jpegd clock improperly indicates that the
+pre-divider width is only 2, when it's actually 4 bits wide.
+
+Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)"
+Tested-by: Rob Clark <robdclark@gmail.com>
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/qcom/mmcc-msm8960.c | 82 ++++++++++++++++++++--------------------
+ 1 file changed, 42 insertions(+), 40 deletions(-)
+
+--- a/drivers/clk/qcom/mmcc-msm8960.c
++++ b/drivers/clk/qcom/mmcc-msm8960.c
+@@ -38,6 +38,8 @@
+ #define P_PLL2 2
+ #define P_PLL3 3
+
++#define F_MN(f, s, _m, _n) { .freq = f, .src = s, .m = _m, .n = _n }
++
+ static u8 mmcc_pxo_pll8_pll2_map[] = {
+ [P_PXO] = 0,
+ [P_PLL8] = 2,
+@@ -59,8 +61,8 @@ static u8 mmcc_pxo_pll8_pll2_pll3_map[]
+
+ static const char *mmcc_pxo_pll8_pll2_pll3[] = {
+ "pxo",
+- "pll2",
+ "pll8_vote",
++ "pll2",
+ "pll3",
+ };
+
+@@ -710,18 +712,18 @@ static struct clk_branch csiphy2_timer_c
+ };
+
+ static struct freq_tbl clk_tbl_gfx2d[] = {
+- { 27000000, P_PXO, 1, 0 },
+- { 48000000, P_PLL8, 1, 8 },
+- { 54857000, P_PLL8, 1, 7 },
+- { 64000000, P_PLL8, 1, 6 },
+- { 76800000, P_PLL8, 1, 5 },
+- { 96000000, P_PLL8, 1, 4 },
+- { 128000000, P_PLL8, 1, 3 },
+- { 145455000, P_PLL2, 2, 11 },
+- { 160000000, P_PLL2, 1, 5 },
+- { 177778000, P_PLL2, 2, 9 },
+- { 200000000, P_PLL2, 1, 4 },
+- { 228571000, P_PLL2, 2, 7 },
++ F_MN( 27000000, P_PXO, 1, 0),
++ F_MN( 48000000, P_PLL8, 1, 8),
++ F_MN( 54857000, P_PLL8, 1, 7),
++ F_MN( 64000000, P_PLL8, 1, 6),
++ F_MN( 76800000, P_PLL8, 1, 5),
++ F_MN( 96000000, P_PLL8, 1, 4),
++ F_MN(128000000, P_PLL8, 1, 3),
++ F_MN(145455000, P_PLL2, 2, 11),
++ F_MN(160000000, P_PLL2, 1, 5),
++ F_MN(177778000, P_PLL2, 2, 9),
++ F_MN(200000000, P_PLL2, 1, 4),
++ F_MN(228571000, P_PLL2, 2, 7),
+ { }
+ };
+
+@@ -842,22 +844,22 @@ static struct clk_branch gfx2d1_clk = {
+ };
+
+ static struct freq_tbl clk_tbl_gfx3d[] = {
+- { 27000000, P_PXO, 1, 0 },
+- { 48000000, P_PLL8, 1, 8 },
+- { 54857000, P_PLL8, 1, 7 },
+- { 64000000, P_PLL8, 1, 6 },
+- { 76800000, P_PLL8, 1, 5 },
+- { 96000000, P_PLL8, 1, 4 },
+- { 128000000, P_PLL8, 1, 3 },
+- { 145455000, P_PLL2, 2, 11 },
+- { 160000000, P_PLL2, 1, 5 },
+- { 177778000, P_PLL2, 2, 9 },
+- { 200000000, P_PLL2, 1, 4 },
+- { 228571000, P_PLL2, 2, 7 },
+- { 266667000, P_PLL2, 1, 3 },
+- { 300000000, P_PLL3, 1, 4 },
+- { 320000000, P_PLL2, 2, 5 },
+- { 400000000, P_PLL2, 1, 2 },
++ F_MN( 27000000, P_PXO, 1, 0),
++ F_MN( 48000000, P_PLL8, 1, 8),
++ F_MN( 54857000, P_PLL8, 1, 7),
++ F_MN( 64000000, P_PLL8, 1, 6),
++ F_MN( 76800000, P_PLL8, 1, 5),
++ F_MN( 96000000, P_PLL8, 1, 4),
++ F_MN(128000000, P_PLL8, 1, 3),
++ F_MN(145455000, P_PLL2, 2, 11),
++ F_MN(160000000, P_PLL2, 1, 5),
++ F_MN(177778000, P_PLL2, 2, 9),
++ F_MN(200000000, P_PLL2, 1, 4),
++ F_MN(228571000, P_PLL2, 2, 7),
++ F_MN(266667000, P_PLL2, 1, 3),
++ F_MN(300000000, P_PLL3, 1, 4),
++ F_MN(320000000, P_PLL2, 2, 5),
++ F_MN(400000000, P_PLL2, 1, 2),
+ { }
+ };
+
+@@ -897,7 +899,7 @@ static struct clk_dyn_rcg gfx3d_src = {
+ .hw.init = &(struct clk_init_data){
+ .name = "gfx3d_src",
+ .parent_names = mmcc_pxo_pll8_pll2_pll3,
+- .num_parents = 3,
++ .num_parents = 4,
+ .ops = &clk_dyn_rcg_ops,
+ },
+ },
+@@ -995,7 +997,7 @@ static struct clk_rcg jpegd_src = {
+ .ns_reg = 0x00ac,
+ .p = {
+ .pre_div_shift = 12,
+- .pre_div_width = 2,
++ .pre_div_width = 4,
+ },
+ .s = {
+ .src_sel_shift = 0,
+@@ -1342,15 +1344,15 @@ static struct clk_branch hdmi_app_clk =
+ };
+
+ static struct freq_tbl clk_tbl_vcodec[] = {
+- { 27000000, P_PXO, 1, 0 },
+- { 32000000, P_PLL8, 1, 12 },
+- { 48000000, P_PLL8, 1, 8 },
+- { 54860000, P_PLL8, 1, 7 },
+- { 96000000, P_PLL8, 1, 4 },
+- { 133330000, P_PLL2, 1, 6 },
+- { 200000000, P_PLL2, 1, 4 },
+- { 228570000, P_PLL2, 2, 7 },
+- { 266670000, P_PLL2, 1, 3 },
++ F_MN( 27000000, P_PXO, 1, 0),
++ F_MN( 32000000, P_PLL8, 1, 12),
++ F_MN( 48000000, P_PLL8, 1, 8),
++ F_MN( 54860000, P_PLL8, 1, 7),
++ F_MN( 96000000, P_PLL8, 1, 4),
++ F_MN(133330000, P_PLL2, 1, 6),
++ F_MN(200000000, P_PLL2, 1, 4),
++ F_MN(228570000, P_PLL2, 2, 7),
++ F_MN(266670000, P_PLL2, 1, 3),
+ { }
+ };
+
--- /dev/null
+From 5b6b7490af110c2b0df807eddd00ae6290bcf50a Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Tue, 15 Jul 2014 14:59:21 -0700
+Subject: clk: qcom: Fix PLL rate configurations
+
+From: Stephen Boyd <sboyd@codeaurora.org>
+
+commit 5b6b7490af110c2b0df807eddd00ae6290bcf50a upstream.
+
+Sometimes we need to program PLLs with a fixed rate
+configuration during driver probe. Doing this after we register
+the PLLs with the clock framework causes the common clock
+framework to assume the rate of the PLLs are 0. This causes all
+sorts of problems for rate recalculations because the common
+clock framework caches the rate once at registration time unless
+a flag is set to always recalculate the rates.
+
+Split the qcom_cc_probe() function into two pieces, map and
+everything else, so that drivers which need to configure some
+PLL rates or otherwise twiddle bits in the clock controller can
+do so before registering clocks. This allows us to properly
+detect the rates of PLLs that are programmed at boot.
+
+Fixes: 49fc825f0cc2 "clk: qcom: Consolidate common probe code"
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/qcom/common.c | 39 ++++++++++++++++++++++++++++-----------
+ drivers/clk/qcom/common.h | 6 ++++++
+ drivers/clk/qcom/mmcc-msm8974.c | 10 ++++------
+ 3 files changed, 38 insertions(+), 17 deletions(-)
+
+--- a/drivers/clk/qcom/common.c
++++ b/drivers/clk/qcom/common.c
+@@ -27,30 +27,35 @@ struct qcom_cc {
+ struct clk *clks[];
+ };
+
+-int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
++struct regmap *
++qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
+ {
+ void __iomem *base;
+ struct resource *res;
++ struct device *dev = &pdev->dev;
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ base = devm_ioremap_resource(dev, res);
++ if (IS_ERR(base))
++ return ERR_CAST(base);
++
++ return devm_regmap_init_mmio(dev, base, desc->config);
++}
++EXPORT_SYMBOL_GPL(qcom_cc_map);
++
++int qcom_cc_really_probe(struct platform_device *pdev,
++ const struct qcom_cc_desc *desc, struct regmap *regmap)
++{
+ int i, ret;
+ struct device *dev = &pdev->dev;
+ struct clk *clk;
+ struct clk_onecell_data *data;
+ struct clk **clks;
+- struct regmap *regmap;
+ struct qcom_reset_controller *reset;
+ struct qcom_cc *cc;
+ size_t num_clks = desc->num_clks;
+ struct clk_regmap **rclks = desc->clks;
+
+- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+- base = devm_ioremap_resource(dev, res);
+- if (IS_ERR(base))
+- return PTR_ERR(base);
+-
+- regmap = devm_regmap_init_mmio(dev, base, desc->config);
+- if (IS_ERR(regmap))
+- return PTR_ERR(regmap);
+-
+ cc = devm_kzalloc(dev, sizeof(*cc) + sizeof(*clks) * num_clks,
+ GFP_KERNEL);
+ if (!cc)
+@@ -91,6 +96,18 @@ int qcom_cc_probe(struct platform_device
+
+ return ret;
+ }
++EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
++
++int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
++{
++ struct regmap *regmap;
++
++ regmap = qcom_cc_map(pdev, desc);
++ if (IS_ERR(regmap))
++ return PTR_ERR(regmap);
++
++ return qcom_cc_really_probe(pdev, desc, regmap);
++}
+ EXPORT_SYMBOL_GPL(qcom_cc_probe);
+
+ void qcom_cc_remove(struct platform_device *pdev)
+--- a/drivers/clk/qcom/common.h
++++ b/drivers/clk/qcom/common.h
+@@ -17,6 +17,7 @@ struct platform_device;
+ struct regmap_config;
+ struct clk_regmap;
+ struct qcom_reset_map;
++struct regmap;
+
+ struct qcom_cc_desc {
+ const struct regmap_config *config;
+@@ -26,6 +27,11 @@ struct qcom_cc_desc {
+ size_t num_resets;
+ };
+
++extern struct regmap *qcom_cc_map(struct platform_device *pdev,
++ const struct qcom_cc_desc *desc);
++extern int qcom_cc_really_probe(struct platform_device *pdev,
++ const struct qcom_cc_desc *desc,
++ struct regmap *regmap);
+ extern int qcom_cc_probe(struct platform_device *pdev,
+ const struct qcom_cc_desc *desc);
+
+--- a/drivers/clk/qcom/mmcc-msm8974.c
++++ b/drivers/clk/qcom/mmcc-msm8974.c
+@@ -2547,18 +2547,16 @@ MODULE_DEVICE_TABLE(of, mmcc_msm8974_mat
+
+ static int mmcc_msm8974_probe(struct platform_device *pdev)
+ {
+- int ret;
+ struct regmap *regmap;
+
+- ret = qcom_cc_probe(pdev, &mmcc_msm8974_desc);
+- if (ret)
+- return ret;
++ regmap = qcom_cc_map(pdev, &mmcc_msm8974_desc);
++ if (IS_ERR(regmap))
++ return PTR_ERR(regmap);
+
+- regmap = dev_get_regmap(&pdev->dev, NULL);
+ clk_pll_configure_sr_hpm_lp(&mmpll1, regmap, &mmpll1_config, true);
+ clk_pll_configure_sr_hpm_lp(&mmpll3, regmap, &mmpll3_config, false);
+
+- return 0;
++ return qcom_cc_really_probe(pdev, &mmcc_msm8974_desc, regmap);
+ }
+
+ static int mmcc_msm8974_remove(struct platform_device *pdev)
--- /dev/null
+From f87dfcabc6f173cc811d185d33327f50a8c88399 Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Tue, 8 Jul 2014 18:36:06 -0700
+Subject: clk: qcom: mdp_lut_clk is a child of mdp_src
+
+From: Stephen Boyd <sboyd@codeaurora.org>
+
+commit f87dfcabc6f173cc811d185d33327f50a8c88399 upstream.
+
+The mdp_lut_clk isn't a child of the mdp_clk. Instead it's the
+child of the mdp_src clock. Fix it.
+
+Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)"
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/qcom/mmcc-msm8960.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/mmcc-msm8960.c
++++ b/drivers/clk/qcom/mmcc-msm8960.c
+@@ -1117,7 +1117,7 @@ static struct clk_branch mdp_lut_clk = {
+ .enable_reg = 0x016c,
+ .enable_mask = BIT(0),
+ .hw.init = &(struct clk_init_data){
+- .parent_names = (const char *[]){ "mdp_clk" },
++ .parent_names = (const char *[]){ "mdp_src" },
+ .num_parents = 1,
+ .name = "mdp_lut_clk",
+ .ops = &clk_branch_ops,
--- /dev/null
+From 2f1032517623b70920d99529e5c87c8c680ab8bf Mon Sep 17 00:00:00 2001
+From: Nishanth Menon <nm@ti.com>
+Date: Mon, 18 Aug 2014 11:56:54 -0500
+Subject: clk: ti: divider: Provide error check for incoming parameters in set_rate
+
+From: Nishanth Menon <nm@ti.com>
+
+commit 2f1032517623b70920d99529e5c87c8c680ab8bf upstream.
+
+Check for valid parameters in check rate. Else, we end up getting errors
+like:
+[ 0.000000] Division by zero in kernel.
+[ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc1 #1
+[ 0.000000] [<c0015160>] (unwind_backtrace) from [<c0011978>] (show_stack+0x10/0x14)
+[ 0.000000] [<c0011978>] (show_stack) from [<c055f5f4>] (dump_stack+0x78/0x94)
+[ 0.000000] [<c055f5f4>] (dump_stack) from [<c02e17cc>] (Ldiv0+0x8/0x10)
+[ 0.000000] [<c02e17cc>] (Ldiv0) from [<c047d228>] (ti_clk_divider_set_rate+0x14/0x14c)
+[ 0.000000] [<c047d228>] (ti_clk_divider_set_rate) from [<c047a938>] (clk_change_rate+0x138/0x180)
+[ 0.000000] [<c047a938>] (clk_change_rate) from [<c047a908>] (clk_change_rate+0x108/0x180)
+
+This occurs as part of the inital clock tree update of child clock nodes
+where new_rate could be 0 for non functional clocks.
+
+Fixes: b4761198bfaf296 ("CLK: ti: add support for ti divider-clock")
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Tero Kristo <t-kristo@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/ti/divider.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/ti/divider.c
++++ b/drivers/clk/ti/divider.c
+@@ -211,11 +211,16 @@ static long ti_clk_divider_round_rate(st
+ static int ti_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+ {
+- struct clk_divider *divider = to_clk_divider(hw);
++ struct clk_divider *divider;
+ unsigned int div, value;
+ unsigned long flags = 0;
+ u32 val;
+
++ if (!hw || !rate)
++ return -EINVAL;
++
++ divider = to_clk_divider(hw);
++
+ div = DIV_ROUND_UP(parent_rate, rate);
+ value = _get_val(divider, div);
+
--- /dev/null
+From 20411dad75ece9a613af715df4489e60990c4017 Mon Sep 17 00:00:00 2001
+From: Nishanth Menon <nm@ti.com>
+Date: Mon, 18 Aug 2014 11:56:55 -0500
+Subject: clk: ti: dra7-atl: Provide error check for incoming parameters in set_rate
+
+From: Nishanth Menon <nm@ti.com>
+
+commit 20411dad75ece9a613af715df4489e60990c4017 upstream.
+
+Check for valid parameters in check rate. Else, we end up getting
+errors.
+
+This occurs as part of the inital clock tree update of child clock
+nodes where new_rate could be 0 for non functional clocks.
+
+Fixes: 9ac33b0ce81fa48 (" CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)")
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Tero Kristo <t-kristo@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/ti/clk-dra7-atl.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/ti/clk-dra7-atl.c
++++ b/drivers/clk/ti/clk-dra7-atl.c
+@@ -139,9 +139,13 @@ static long atl_clk_round_rate(struct cl
+ static int atl_clk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+ {
+- struct dra7_atl_desc *cdesc = to_atl_desc(hw);
++ struct dra7_atl_desc *cdesc;
+ u32 divider;
+
++ if (!hw || !rate)
++ return -EINVAL;
++
++ cdesc = to_atl_desc(hw);
+ divider = ((parent_rate + rate / 2) / rate) - 1;
+ if (divider > DRA7_ATL_DIVIDER_MASK)
+ divider = DRA7_ATL_DIVIDER_MASK;
--- /dev/null
+From a9cfcd63e8d206ce4235c355d857c4fbdf0f4587 Mon Sep 17 00:00:00 2001
+From: Theodore Ts'o <tytso@mit.edu>
+Date: Wed, 3 Sep 2014 09:33:00 -0400
+Subject: ext4: avoid trying to kfree an ERR_PTR pointer
+
+From: Theodore Ts'o <tytso@mit.edu>
+
+commit a9cfcd63e8d206ce4235c355d857c4fbdf0f4587 upstream.
+
+Thanks to Dan Carpenter for extending smatch to find bugs like this.
+(This was found using a development version of smatch.)
+
+Fixes: 36de928641ee48b2078d3fe9514242aaa2f92013
+Reported-by: Dan Carpenter <dan.carpenter@oracle.com
+Signed-off-by: Theodore Ts'o <tytso@mit.edu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/ext4/namei.c | 2 ++
+ fs/ext4/resize.c | 2 ++
+ 2 files changed, 4 insertions(+)
+
+--- a/fs/ext4/namei.c
++++ b/fs/ext4/namei.c
+@@ -3240,6 +3240,7 @@ static int ext4_rename(struct inode *old
+ &new.de, &new.inlined);
+ if (IS_ERR(new.bh)) {
+ retval = PTR_ERR(new.bh);
++ new.bh = NULL;
+ goto end_rename;
+ }
+ if (new.bh) {
+@@ -3386,6 +3387,7 @@ static int ext4_cross_rename(struct inod
+ &new.de, &new.inlined);
+ if (IS_ERR(new.bh)) {
+ retval = PTR_ERR(new.bh);
++ new.bh = NULL;
+ goto end_rename;
+ }
+
+--- a/fs/ext4/resize.c
++++ b/fs/ext4/resize.c
+@@ -575,6 +575,7 @@ handle_bb:
+ bh = bclean(handle, sb, block);
+ if (IS_ERR(bh)) {
+ err = PTR_ERR(bh);
++ bh = NULL;
+ goto out;
+ }
+ overhead = ext4_group_overhead_blocks(sb, group);
+@@ -603,6 +604,7 @@ handle_ib:
+ bh = bclean(handle, sb, block);
+ if (IS_ERR(bh)) {
+ err = PTR_ERR(bh);
++ bh = NULL;
+ goto out;
+ }
+
--- /dev/null
+From 36de928641ee48b2078d3fe9514242aaa2f92013 Mon Sep 17 00:00:00 2001
+From: Theodore Ts'o <tytso@mit.edu>
+Date: Sat, 23 Aug 2014 17:47:19 -0400
+Subject: ext4: propagate errors up to ext4_find_entry()'s callers
+
+From: Theodore Ts'o <tytso@mit.edu>
+
+commit 36de928641ee48b2078d3fe9514242aaa2f92013 upstream.
+
+If we run into some kind of error, such as ENOMEM, while calling
+ext4_getblk() or ext4_dx_find_entry(), we need to make sure this error
+gets propagated up to ext4_find_entry() and then to its callers. This
+way, transient errors such as ENOMEM can get propagated to the VFS.
+This is important so that the system calls return the appropriate
+error, and also so that in the case of ext4_lookup(), we return an
+error instead of a NULL inode, since that will result in a negative
+dentry cache entry that will stick around long past the OOM condition
+which caused a transient ENOMEM error.
+
+Google-Bug-Id: #17142205
+
+Signed-off-by: Theodore Ts'o <tytso@mit.edu>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/ext4/ext4.h | 2 +-
+ fs/ext4/namei.c | 35 +++++++++++++++++++++++++++++++++--
+ 2 files changed, 34 insertions(+), 3 deletions(-)
+
+--- a/fs/ext4/ext4.h
++++ b/fs/ext4/ext4.h
+@@ -1826,7 +1826,7 @@ ext4_group_first_block_no(struct super_b
+ /*
+ * Special error return code only used by dx_probe() and its callers.
+ */
+-#define ERR_BAD_DX_DIR -75000
++#define ERR_BAD_DX_DIR (-(MAX_ERRNO - 1))
+
+ /*
+ * Timeout and state flag for lazy initialization inode thread.
+--- a/fs/ext4/namei.c
++++ b/fs/ext4/namei.c
+@@ -1227,7 +1227,7 @@ static struct buffer_head * ext4_find_en
+ buffer */
+ int num = 0;
+ ext4_lblk_t nblocks;
+- int i, err;
++ int i, err = 0;
+ int namelen;
+
+ *res_dir = NULL;
+@@ -1264,7 +1264,11 @@ static struct buffer_head * ext4_find_en
+ * return. Otherwise, fall back to doing a search the
+ * old fashioned way.
+ */
+- if (bh || (err != ERR_BAD_DX_DIR))
++ if (err == -ENOENT)
++ return NULL;
++ if (err && err != ERR_BAD_DX_DIR)
++ return ERR_PTR(err);
++ if (bh)
+ return bh;
+ dxtrace(printk(KERN_DEBUG "ext4_find_entry: dx failed, "
+ "falling back\n"));
+@@ -1295,6 +1299,11 @@ restart:
+ }
+ num++;
+ bh = ext4_getblk(NULL, dir, b++, 0, &err);
++ if (unlikely(err)) {
++ if (ra_max == 0)
++ return ERR_PTR(err);
++ break;
++ }
+ bh_use[ra_max] = bh;
+ if (bh)
+ ll_rw_block(READ | REQ_META | REQ_PRIO,
+@@ -1417,6 +1426,8 @@ static struct dentry *ext4_lookup(struct
+ return ERR_PTR(-ENAMETOOLONG);
+
+ bh = ext4_find_entry(dir, &dentry->d_name, &de, NULL);
++ if (IS_ERR(bh))
++ return (struct dentry *) bh;
+ inode = NULL;
+ if (bh) {
+ __u32 ino = le32_to_cpu(de->inode);
+@@ -1450,6 +1461,8 @@ struct dentry *ext4_get_parent(struct de
+ struct buffer_head *bh;
+
+ bh = ext4_find_entry(child->d_inode, &dotdot, &de, NULL);
++ if (IS_ERR(bh))
++ return (struct dentry *) bh;
+ if (!bh)
+ return ERR_PTR(-ENOENT);
+ ino = le32_to_cpu(de->inode);
+@@ -2727,6 +2740,8 @@ static int ext4_rmdir(struct inode *dir,
+
+ retval = -ENOENT;
+ bh = ext4_find_entry(dir, &dentry->d_name, &de, NULL);
++ if (IS_ERR(bh))
++ return PTR_ERR(bh);
+ if (!bh)
+ goto end_rmdir;
+
+@@ -2794,6 +2809,8 @@ static int ext4_unlink(struct inode *dir
+
+ retval = -ENOENT;
+ bh = ext4_find_entry(dir, &dentry->d_name, &de, NULL);
++ if (IS_ERR(bh))
++ return PTR_ERR(bh);
+ if (!bh)
+ goto end_unlink;
+
+@@ -3121,6 +3138,8 @@ static int ext4_find_delete_entry(handle
+ struct ext4_dir_entry_2 *de;
+
+ bh = ext4_find_entry(dir, d_name, &de, NULL);
++ if (IS_ERR(bh))
++ return PTR_ERR(bh);
+ if (bh) {
+ retval = ext4_delete_entry(handle, dir, de, bh);
+ brelse(bh);
+@@ -3205,6 +3224,8 @@ static int ext4_rename(struct inode *old
+ dquot_initialize(new.inode);
+
+ old.bh = ext4_find_entry(old.dir, &old.dentry->d_name, &old.de, NULL);
++ if (IS_ERR(old.bh))
++ return PTR_ERR(old.bh);
+ /*
+ * Check for inode number is _not_ due to possible IO errors.
+ * We might rmdir the source, keep it as pwd of some process
+@@ -3217,6 +3238,10 @@ static int ext4_rename(struct inode *old
+
+ new.bh = ext4_find_entry(new.dir, &new.dentry->d_name,
+ &new.de, &new.inlined);
++ if (IS_ERR(new.bh)) {
++ retval = PTR_ERR(new.bh);
++ goto end_rename;
++ }
+ if (new.bh) {
+ if (!new.inode) {
+ brelse(new.bh);
+@@ -3345,6 +3370,8 @@ static int ext4_cross_rename(struct inod
+
+ old.bh = ext4_find_entry(old.dir, &old.dentry->d_name,
+ &old.de, &old.inlined);
++ if (IS_ERR(old.bh))
++ return PTR_ERR(old.bh);
+ /*
+ * Check for inode number is _not_ due to possible IO errors.
+ * We might rmdir the source, keep it as pwd of some process
+@@ -3357,6 +3384,10 @@ static int ext4_cross_rename(struct inod
+
+ new.bh = ext4_find_entry(new.dir, &new.dentry->d_name,
+ &new.de, &new.inlined);
++ if (IS_ERR(new.bh)) {
++ retval = PTR_ERR(new.bh);
++ goto end_rename;
++ }
+
+ /* RENAME_EXCHANGE case: old *and* new must both exist */
+ if (!new.bh || le32_to_cpu(new.de->inode) != new.inode->i_ino)
dmaengine-dw-don-t-perform-dma-when-dmaengine_submit-is-called.patch
partitions-aix.c-off-by-one-bug.patch
cpufreq-update-cpufreq_suspended-after-stopping-governors.patch
+clk-ti-dra7-atl-provide-error-check-for-incoming-parameters-in-set_rate.patch
+clk-prevent-erronous-parsing-of-children-during-rate-change.patch
+clk-ti-divider-provide-error-check-for-incoming-parameters-in-set_rate.patch
+ahci_xgene-removing-ncq-support-from-the-apm-x-gene-soc-ahci-sata-host-controller-driver.patch
+aio-block-exit_aio-until-all-context-requests-are-completed.patch
+ext4-propagate-errors-up-to-ext4_find_entry-s-callers.patch
+ext4-avoid-trying-to-kfree-an-err_ptr-pointer.patch
+staging-lustre-disable-virtual-block-device-for-64k-pages.patch
+clk-qcom-fix-mn-frequency-tables-parent-map-and-jpegd.patch
+clk-qcom-mdp_lut_clk-is-a-child-of-mdp_src.patch
+clk-qcom-fix-pll-rate-configurations.patch
--- /dev/null
+From 0bf22be0da8ea74bc7ccc5b07d7855830be16eca Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 20 Jun 2014 14:23:28 +0200
+Subject: staging/lustre: disable virtual block device for 64K pages
+
+From: Arnd Bergmann <arnd@arndb.de>
+
+commit 0bf22be0da8ea74bc7ccc5b07d7855830be16eca upstream.
+
+The lustre virtual block device cannot handle 64K pages and fails at compile
+time. To avoid running into this error, let's disable the Kconfig option
+for this driver in cases it doesn't support.
+
+Reported-by: Dann Frazier <dann.frazier@canonical.com>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/staging/lustre/lustre/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/staging/lustre/lustre/Kconfig
++++ b/drivers/staging/lustre/lustre/Kconfig
+@@ -57,4 +57,5 @@ config LUSTRE_TRANSLATE_ERRNOS
+ config LUSTRE_LLITE_LLOOP
+ tristate "Lustre virtual block device"
+ depends on LUSTRE_FS && BLOCK
++ depends on !PPC_64K_PAGES && !ARM64_64K_PAGES
+ default m
projects / thirdparty / kernel / stable-queue.git / commitdiff
