/* Replicate the value according to SIMD size. */
switch (simd_size)
{
- case 2: imm = (imm << 2) | imm;
- case 4: imm = (imm << 4) | imm;
- case 8: imm = (imm << 8) | imm;
- case 16: imm = (imm << 16) | imm;
- case 32: imm = (imm << 32) | imm;
+ case 2: imm = (imm << 2) | imm; ATTRIBUTE_FALLTHROUGH;
+ case 4: imm = (imm << 4) | imm; ATTRIBUTE_FALLTHROUGH;
+ case 8: imm = (imm << 8) | imm; ATTRIBUTE_FALLTHROUGH;
+ case 16: imm = (imm << 16) | imm; ATTRIBUTE_FALLTHROUGH;
+ case 32: imm = (imm << 32) | imm; ATTRIBUTE_FALLTHROUGH;
case 64: break;
default: return 0;
}
{
case UXTB: return aarch64_get_reg_u8 (cpu, lo, NO_SP);
case UXTH: return aarch64_get_reg_u16 (cpu, lo, NO_SP);
- case UXTW: /* Fall through. */
+ case UXTW: ATTRIBUTE_FALLTHROUGH;
case UXTX: return aarch64_get_reg_u32 (cpu, lo, NO_SP);
case SXTB: return aarch64_get_reg_s8 (cpu, lo, NO_SP);
case SXTH: return aarch64_get_reg_s16 (cpu, lo, NO_SP);
- case SXTW: /* Fall through. */
- case SXTX: /* Fall through. */
+ case SXTW: ATTRIBUTE_FALLTHROUGH;
+ case SXTX: ATTRIBUTE_FALLTHROUGH;
default: return aarch64_get_reg_s32 (cpu, lo, NO_SP);
}
}
case 0xa: /* 16-bit, shift by 8. */
val <<= 8;
- /* Fall through. */
+ ATTRIBUTE_FALLTHROUGH;
case 0x8: /* 16-bit, no shift. */
for (i = 0; i < (full ? 8 : 4); i++)
aarch64_set_vec_u16 (cpu, vd, i, val);
case 0xd: /* 32-bit, mask shift by 16. */
val <<= 8;
val |= 0xFF;
- /* Fall through. */
+ ATTRIBUTE_FALLTHROUGH;
case 0xc: /* 32-bit, mask shift by 8. */
val <<= 8;
val |= 0xFF;
case 0xa: /* 16-bit, 8 bit shift. */
val <<= 8;
+ ATTRIBUTE_FALLTHROUGH;
case 0x8: /* 16-bit, no shift. */
val = ~ val;
for (i = 0; i < (full ? 8 : 4); i++)
case 0xd: /* 32-bit, mask shift by 16. */
val <<= 8;
val |= 0xFF;
+ ATTRIBUTE_FALLTHROUGH;
case 0xc: /* 32-bit, mask shift by 8. */
val <<= 8;
val |= 0xFF;
aarch64_get_vec_##SOURCE##64 (cpu, vm, i) \
? -1ULL : 0); \
return; \
+ default: \
+ HALT_UNALLOC; \
} \
} \
while (0)
aarch64_get_vec_##SOURCE##64 (cpu, vn, i) \
CMP 0 ? -1ULL : 0); \
return; \
+ default: \
+ HALT_UNALLOC; \
} \
} \
while (0)
{
case 2: /* SSUBL2. */
bias = 2;
+ ATTRIBUTE_FALLTHROUGH;
case 0: /* SSUBL. */
switch (size)
{
case 3: /* USUBL2. */
bias = 2;
+ ATTRIBUTE_FALLTHROUGH;
case 1: /* USUBL. */
switch (size)
{
{
case 2: /* SXTL2, SSHLL2. */
bias = 2;
+ ATTRIBUTE_FALLTHROUGH;
case 0: /* SXTL, SSHLL. */
if (INSTR (21, 21))
{
case 3: /* UXTL2, USHLL2. */
bias = 2;
+ ATTRIBUTE_FALLTHROUGH;
case 1: /* UXTL, USHLL. */
if (INSTR (21, 21))
{
case 1: scvtd32 (cpu); return;
case 2: scvtf (cpu); return;
case 3: scvtd (cpu); return;
+ default: HALT_UNALLOC;
}
case 6: /* FMOV GR, Vec. */
case 1: fcvtszd32 (cpu); return;
case 2: fcvtszs (cpu); return;
case 3: fcvtszd (cpu); return;
+ default: HALT_UNALLOC;
}
case 25: do_fcvtzu (cpu); return;
case 3: /* 011 */
val1 = fabs (val1);
val2 = fabs (val2);
- /* Fall through. */
+ ATTRIBUTE_FALLTHROUGH;
case 2: /* 010 */
result = val1 >= val2;
break;
case 7: /* 111 */
val1 = fabs (val1);
val2 = fabs (val2);
- /* Fall through. */
+ ATTRIBUTE_FALLTHROUGH;
case 6: /* 110 */
result = val1 > val2;
break;
case 3: /* 011 */
val1 = fabsf (val1);
val2 = fabsf (val2);
- /* Fall through. */
+ ATTRIBUTE_FALLTHROUGH;
case 2: /* 010 */
result = val1 >= val2;
break;
case 7: /* 111 */
val1 = fabsf (val1);
val2 = fabsf (val2);
- /* Fall through. */
+ ATTRIBUTE_FALLTHROUGH;
case 6: /* 110 */
result = val1 > val2;
break;