aarch64: Use the correct GP mode in the svcmp_wide patterns

The patterns for the svcmp_wide intrinsics used a VNx16BI
input predicate for all modes, instead of the usual <VPRED>.
That unnecessarily made some input bits significant, but more
importantly, it triggered an ICE in aarch64_sve_same_pred_for_ptest_p
when testing whether a comparison pattern could be fused with a PTEST.

A later patch will add tests for other comparisons.

gcc/
	* config/aarch64/aarch64-sve.md (@aarch64_pred_cmp<cmp_op><mode>_wide)
	(*aarch64_pred_cmp<cmp_op><mode>_wide_cc): Use <VPRED> instead of
	VNx16BI for the governing predicate.
	(*aarch64_pred_cmp<cmp_op><mode>_wide_ptest): Likewise.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general/cmpeq_1.c: Add more tests.

diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index bb4a85d764a36cc9757f15754e00f3b778c5890d..324855a3ee9eec402d508330c8409c1e120459fc 100644 (file)
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -8617,7 +8617,7 @@
 (define_insn "@aarch64_pred_cmp<cmp_op><mode>_wide"
   [(set (match_operand:<VPRED> 0 "register_operand")
        (unspec:<VPRED>
-         [(match_operand:VNx16BI 1 "register_operand")
+         [(match_operand:<VPRED> 1 "register_operand")
           (match_operand:SI 2 "aarch64_sve_ptrue_flag")
           (unspec:<VPRED>
             [(match_operand:SVE_FULL_BHSI 3 "register_operand")
@@ -8642,7 +8642,7 @@
           (match_operand 4)
           (match_operand:SI 5 "aarch64_sve_ptrue_flag")
           (unspec:<VPRED>
-            [(match_operand:VNx16BI 6 "register_operand")
+            [(match_operand:<VPRED> 6 "register_operand")
              (match_operand:SI 7 "aarch64_sve_ptrue_flag")
              (unspec:<VPRED>
                [(match_operand:SVE_FULL_BHSI 2 "register_operand")
@@ -8677,7 +8677,7 @@
           (match_operand 4)
           (match_operand:SI 5 "aarch64_sve_ptrue_flag")
           (unspec:<VPRED>
-            [(match_operand:VNx16BI 6 "register_operand")
+            [(match_operand:<VPRED> 6 "register_operand")
              (match_operand:SI 7 "aarch64_sve_ptrue_flag")
              (unspec:<VPRED>
                [(match_operand:SVE_FULL_BHSI 2 "register_operand")

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cmpeq_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cmpeq_1.c
index dd8f6c4942491b62bbd9335f0d06fb7d5f6dc080..c73d10959fa8aa7e08205bace943e0f859850730 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cmpeq_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cmpeq_1.c
@@ -18,5 +18,56 @@ test2 (svbool_t pg, svint8_t x, svint64_t y, int *any)
   return svptest_any (pg, res);
 }
 
-/* { dg-final { scan-assembler-times {\tcmpeq\t} 2 } } */
+void
+test3 (svint8_t x, svint64_t y, int *any, svbool_t *ptr)
+{
+  svbool_t pg = svptrue_b8 ();
+  svbool_t res = svcmpeq_wide (pg, x, y);
+  *any = svptest_any (pg, res);
+  *ptr = res;
+}
+
+int
+test4 (svint8_t x, svint64_t y, int *any)
+{
+  svbool_t pg = svptrue_b8 ();
+  svbool_t res = svcmpeq_wide (pg, x, y);
+  return svptest_any (pg, res);
+}
+
+void
+test5 (svint16_t x, svint64_t y, int *any, svbool_t *ptr)
+{
+  svbool_t pg = svptrue_b16 ();
+  svbool_t res = svcmpeq_wide (pg, x, y);
+  *any = svptest_any (pg, res);
+  *ptr = res;
+}
+
+int
+test6 (svint16_t x, svint64_t y, int *any)
+{
+  svbool_t pg = svptrue_b16 ();
+  svbool_t res = svcmpeq_wide (pg, x, y);
+  return svptest_any (pg, res);
+}
+
+void
+test7 (svint32_t x, svint64_t y, int *any, svbool_t *ptr)
+{
+  svbool_t pg = svptrue_b32 ();
+  svbool_t res = svcmpeq_wide (pg, x, y);
+  *any = svptest_any (pg, res);
+  *ptr = res;
+}
+
+int
+test8 (svint32_t x, svint64_t y, int *any)
+{
+  svbool_t pg = svptrue_b32 ();
+  svbool_t res = svcmpeq_wide (pg, x, y);
+  return svptest_any (pg, res);
+}
+
+/* { dg-final { scan-assembler-times {\tcmpeq\t} 8 } } */
 /* { dg-final { scan-assembler-not {\tptest\t} } } */