mips: dts: realtek: Add syscon-reboot node

The board level reset on systems using the RTL9302 can be driven via the
switch. Use a syscon-reboot node to represent this.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
index 77d2566545f269afd7a3db22cfac9c1d8af8ef73..6789bf3740446ea30edab781d12a19fdaee21d33 100644 (file)
--- a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
+++ b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 /dts-v1/;
 
-#include "rtl930x.dtsi"
+#include "rtl9302c.dtsi"
 
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/gpio/gpio.h>

diff --git a/arch/mips/boot/dts/realtek/rtl9302c.dtsi b/arch/mips/boot/dts/realtek/rtl9302c.dtsi
new file mode 100644 (file)
index 0000000..ca4d347
--- /dev/null
+++ b/arch/mips/boot/dts/realtek/rtl9302c.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
+
+#include "rtl930x.dtsi"
+
+&switch0 {
+       compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd";
+};

diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
index f271940f82bea1b44e0cc757babf18bc6a39999b..7477fae34987e3b0a7fac108edd1afd9151e1c56 100644 (file)
--- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
@@ -29,6 +29,19 @@
                #clock-cells = <0>;
                clock-frequency  = <175000000>;
        };
+
+       switch0: switch@1b000000 {
+               compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd";
+               reg = <0x1b000000 0x10000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               reboot@c {
+                       compatible = "syscon-reboot";
+                       reg = <0x0c 0x4>;
+                       value = <0x01>;
+               };
+       };
 };
 
 &soc {