clk: renesas: rzg2l: Remove critical area

The spinlock in rzg2l_mod_clock_endisable() is intended to protect
RMW-accesses to the hardware register.  There is no need to protect
instructions that set temporary variables which will be written
afterwards to a hardware register.  With this only one write to one
clock register is executed thus locking/unlocking rmw_lock is removed.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-7-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index a4723dd3a0708edad0540b5bb9895683257eb4b4..3e4773b130768eac41f0bb7ae287a9d64470042d 100644 (file)
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -895,7 +895,6 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
        struct rzg2l_cpg_priv *priv = clock->priv;
        unsigned int reg = clock->off;
        struct device *dev = priv->dev;
-       unsigned long flags;
        u32 bitmask = BIT(clock->bit);
        u32 value;
        int error;
@@ -907,14 +906,12 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
 
        dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk,
                enable ? "ON" : "OFF");
-       spin_lock_irqsave(&priv->rmw_lock, flags);
 
        value = bitmask << 16;
        if (enable)
                value |= bitmask;
-       writel(value, priv->base + CLK_ON_R(reg));
 
-       spin_unlock_irqrestore(&priv->rmw_lock, flags);
+       writel(value, priv->base + CLK_ON_R(reg));
 
        if (!enable)
                return 0;