+2025-06-03 Richard Biener <rguenther@suse.de>
+
+ * gimple-fold.cc (create_tmp_reg_or_ssa_name): Always
+ create a SSA name.
+
+2025-06-03 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/riscv-v.cc (expand_vx_binary_vec_vec_dup): Add new
+ case for DIV op.
+ * config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add new func
+ to get the cost of vector binary.
+ (riscv_rtx_costs): Add div rtx match and leverage above wrap to
+ get cost.
+ * config/riscv/vector-iterators.md: Add new op div to no_shift_vx_op.
+
+2025-06-03 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/120517
+ * tree-vect-data-refs.cc (vect_analyze_data_ref_accesses):
+ Fix math in dataref group split.
+
+2025-06-03 Paul-Antoine Arras <parras@baylibre.com>
+
+ * config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost): Replace
+ FR2VR with get_fr2vr_cost ().
+ * config/riscv/riscv.cc (riscv_register_move_cost): Likewise.
+ (riscv_builtin_vectorization_cost): Likewise.
+
+2025-06-03 Paul-Antoine Arras <parras@baylibre.com>
+
+ PR target/119100
+ * config/riscv/autovec-opt.md (*<optab>_vf_<mode>): Add new pattern to
+ combine vec_duplicate + vfm{add,sub}.vv into vfm{add,sub}.vf.
+ * config/riscv/riscv-opts.h (FPR2VR_COST_UNPROVIDED): Define.
+ * config/riscv/riscv-protos.h (get_fr2vr_cost): Declare function.
+ * config/riscv/riscv.cc (riscv_rtx_costs): Add cost model for MULT with
+ VEC_DUPLICATE.
+ (get_fr2vr_cost): New function.
+ * config/riscv/riscv.opt: Add new option --param=fpr2vr-cost.
+
+2025-06-03 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR tree-optimization/120451
+ * tree-switch-conversion.cc (switch_conversion::build_one_array): Mark
+ the newly created decl as mergable.
+
2025-06-02 Alexandre Oliva <oliva@adacore.com>
PR rtl-optimization/120424
+2025-06-03 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/99838
+ * gfortran.dg/coarray_data_2.f90: New test.
+
+2025-06-03 Martin Uecker <uecker@tugraz.at>
+
+ PR c/120078
+ * gcc.dg/Wjump-misses-init-3.c: New test.
+
+2025-06-03 Martin Uecker <uecker@tugraz.at>
+
+ * gcc.dg/gnu23-tag-composite-6.c: Update.
+
+2025-06-03 Martin Uecker <uecker@tugraz.at>
+
+ PR c/116892
+ * gcc.dg/pr116892.c: New test.
+
+2025-06-03 Jason Merrill <jason@redhat.com>
+
+ * g++.dg/modules/cpp-1.C
+ * g++.dg/modules/cpp-3.C
+ * g++.dg/modules/cpp-4.C: Specify -fno-modules.
+
+2025-06-03 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c: Adjust
+ the asm check for vdiv.
+ * gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv-nofm.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv.c: Ditto.
+
+2025-06-03 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check
+ check for vdiv.vx combine.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
+
+2025-06-03 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
+ for vdiv.vx combine.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
+ data for vdiv run test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i64.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i8.c: New test.
+
+2025-06-03 Paul-Antoine Arras <parras@baylibre.com>
+
+ PR target/119100
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_data.h: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_run.h: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f64.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f32.c: New test.
+ * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f64.c: New test.
+
+2025-06-03 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/103750
+ * g++.target/i386/pr103750.C: New test.
+
+2025-06-03 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR tree-optimization/116824
+ * gcc.dg/tree-ssa/phiprop-2.c: New test.
+
+2025-06-03 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR tree-optimization/120451
+ * gcc.dg/tree-ssa/cswtch-6.c: New test.
+
2025-06-02 Alexandre Oliva <oliva@adacore.com>
PR rtl-optimization/120424
+2025-06-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/stop_token: Check __glibcxx_jthread instead of
+ __cplusplus.
+
+2025-06-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/type_traits (is_destructible, is_destructible_v):
+ Define using new built-in.
+ (is_nothrow_destructible, is_nothrow_destructible_v): Likewise.
+ (is_trivially_destructible, is_trivially_destructible_v):
+ Likewise.
+
+2025-06-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/atomic_timed_wait.h (__detail::__wait_until):
+ Remove incorrect comment.
+ (__atomic_wait_address_until_v): Do not take address of __args in
+ call to __detail::__wait_until. Fix return statement to refer to
+ member of __wait_result_type.
+ (__atomic_wait_address_for_v): Change parameter type from
+ time_point to duration.
+ * src/c++20/atomic.cc (__spin_until_impl): Fix incorrect
+ return value. Reuse result of first call to clock.
+
+2025-06-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/stl_vector.h (~_Vector_base): Add unreachable
+ hint for negative capacity and cast to size_t explicitly.
+ * include/bits/vector.tcc (vector::_M_realloc_append): Use
+ size() instead of end() - begin().
+
+2025-06-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/bit (__rotl, __rotr): Use static_cast for
+ conversion from int to unsigned.
+
+2025-06-03 Jonathan Wakely <jwakely@redhat.com>
+
+ * src/c++23/std.cc.in: Remove redundant checks for feature test
+ macros that are always true.
+
2025-06-02 Jonathan Wakely <jwakely@redhat.com>
* include/bits/basic_string.h (basic_string::size): Remove space
projects / thirdparty / gcc.git / commitdiff
