ARM: dts: renesas: r9a06g032: Fix UART dma channel order

make dtbs_check:

    arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:0: 'tx' was expected
	    from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
    arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:1: 'rx' was expected
	    from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
    ...

The DT bindings specify a fixed order of the channels in the dmas and
dma-names properties, while the Linux driver does not care.
Get rid of the warnings by changing the order in the DTS to match the
bindings.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/bcb604ad6e567de4e0410756ba840c82a32ff7d3.1739525488.git.geert+renesas@glider.be

diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 7548291c8d7ede43920e2387f104239658e72445..87e03446fb4de705e9d3e7f4a141e4c2392c95d8 100644 (file)
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -211,8 +211,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>;
                        clock-names = "baudclk", "apb_pclk";
-                       dmas = <&dmamux 0 0 0 0 0 1>, <&dmamux 1 0 0 0 1 1>;
-                       dma-names = "rx", "tx";
+                       dmas = <&dmamux 1 0 0 0 1 1>, <&dmamux 0 0 0 0 0 1>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
@@ -224,8 +224,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>;
                        clock-names = "baudclk", "apb_pclk";
-                       dmas = <&dmamux 2 0 0 0 2 1>, <&dmamux 3 0 0 0 3 1>;
-                       dma-names = "rx", "tx";
+                       dmas = <&dmamux 3 0 0 0 3 1>, <&dmamux 2 0 0 0 2 1>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
@@ -237,8 +237,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>;
                        clock-names = "baudclk", "apb_pclk";
-                       dmas = <&dmamux 4 0 0 0 4 1>, <&dmamux 5 0 0 0 5 1>;
-                       dma-names = "rx", "tx";
+                       dmas = <&dmamux 5 0 0 0 5 1>, <&dmamux 4 0 0 0 4 1>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
@@ -250,8 +250,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>;
                        clock-names = "baudclk", "apb_pclk";
-                       dmas = <&dmamux 6 0 0 0 6 1>, <&dmamux 7 0 0 0 7 1>;
-                       dma-names = "rx", "tx";
+                       dmas = <&dmamux 7 0 0 0 7 1>, <&dmamux 6 0 0 0 6 1>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
@@ -263,8 +263,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>;
                        clock-names = "baudclk", "apb_pclk";
-                       dmas = <&dmamux 4 0 0 0 20 1>, <&dmamux 5 0 0 0 21 1>;
-                       dma-names = "rx", "tx";
+                       dmas = <&dmamux 5 0 0 0 21 1>, <&dmamux 4 0 0 0 20 1>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };