5.17-stable patches

added patches:
	rdma-hns-remove-the-num_cqc_timer-variable.patch
	rdma-rxe-generate-a-completion-for-unsupported-invalid-opcode.patch

diff --git a/queue-5.17/rdma-hns-remove-the-num_cqc_timer-variable.patch b/queue-5.17/rdma-hns-remove-the-num_cqc_timer-variable.patch
new file mode 100644 (file)
index 0000000..6d57259
--- /dev/null
+++ b/queue-5.17/rdma-hns-remove-the-num_cqc_timer-variable.patch
@@ -0,0 +1,78 @@
+From db5dfbf5b201df65c1f5332c4d9d5e7c2f42396b Mon Sep 17 00:00:00 2001
+From: Yixing Liu <liuyixing1@huawei.com>
+Date: Fri, 29 Apr 2022 17:35:45 +0800
+Subject: RDMA/hns: Remove the num_cqc_timer variable
+
+From: Yixing Liu <liuyixing1@huawei.com>
+
+commit db5dfbf5b201df65c1f5332c4d9d5e7c2f42396b upstream.
+
+The bt number of cqc_timer of HIP09 increases compared with that of HIP08.
+Therefore, cqc_timer_bt_num and num_cqc_timer do not match. As a result,
+the driver may fail to allocate cqc_timer. So the driver needs to uniquely
+uses cqc_timer_bt_num to represent the bt number of cqc_timer.
+
+Fixes: 0e40dc2f70cd ("RDMA/hns: Add timer allocation support for hip08")
+Link: https://lore.kernel.org/r/20220429093545.58070-1-liangwenpeng@huawei.com
+Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
+Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
+Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/infiniband/hw/hns/hns_roce_device.h |    1 -
+ drivers/infiniband/hw/hns/hns_roce_hw_v2.c  |    3 +--
+ drivers/infiniband/hw/hns/hns_roce_hw_v2.h  |    2 +-
+ drivers/infiniband/hw/hns/hns_roce_main.c   |    2 +-
+ 4 files changed, 3 insertions(+), 5 deletions(-)
+
+--- a/drivers/infiniband/hw/hns/hns_roce_device.h
++++ b/drivers/infiniband/hw/hns/hns_roce_device.h
+@@ -721,7 +721,6 @@ struct hns_roce_caps {
+       u32             num_pi_qps;
+       u32             reserved_qps;
+       int             num_qpc_timer;
+-      int             num_cqc_timer;
+       u32             num_srqs;
+       u32             max_wqes;
+       u32             max_srq_wrs;
+--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+@@ -1965,7 +1965,7 @@ static void set_default_caps(struct hns_
+       caps->num_mtpts         = HNS_ROCE_V2_MAX_MTPT_NUM;
+       caps->num_pds           = HNS_ROCE_V2_MAX_PD_NUM;
+       caps->num_qpc_timer     = HNS_ROCE_V2_MAX_QPC_TIMER_NUM;
+-      caps->num_cqc_timer     = HNS_ROCE_V2_MAX_CQC_TIMER_NUM;
++      caps->cqc_timer_bt_num  = HNS_ROCE_V2_MAX_CQC_TIMER_BT_NUM;
+ 
+       caps->max_qp_init_rdma  = HNS_ROCE_V2_MAX_QP_INIT_RDMA;
+       caps->max_qp_dest_rdma  = HNS_ROCE_V2_MAX_QP_DEST_RDMA;
+@@ -2261,7 +2261,6 @@ static int hns_roce_query_pf_caps(struct
+       caps->max_rq_sg = roundup_pow_of_two(caps->max_rq_sg);
+       caps->max_extend_sg          = le32_to_cpu(resp_a->max_extend_sg);
+       caps->num_qpc_timer          = le16_to_cpu(resp_a->num_qpc_timer);
+-      caps->num_cqc_timer          = le16_to_cpu(resp_a->num_cqc_timer);
+       caps->max_srq_sges           = le16_to_cpu(resp_a->max_srq_sges);
+       caps->max_srq_sges = roundup_pow_of_two(caps->max_srq_sges);
+       caps->num_aeq_vectors        = resp_a->num_aeq_vectors;
+--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+@@ -41,7 +41,7 @@
+ #define HNS_ROCE_V2_MAX_SRQ_WR                        0x8000
+ #define HNS_ROCE_V2_MAX_SRQ_SGE                       64
+ #define HNS_ROCE_V2_MAX_CQ_NUM                        0x100000
+-#define HNS_ROCE_V2_MAX_CQC_TIMER_NUM         0x100
++#define HNS_ROCE_V2_MAX_CQC_TIMER_BT_NUM      0x100
+ #define HNS_ROCE_V2_MAX_SRQ_NUM                       0x100000
+ #define HNS_ROCE_V2_MAX_CQE_NUM                       0x400000
+ #define HNS_ROCE_V2_MAX_RQ_SGE_NUM            64
+--- a/drivers/infiniband/hw/hns/hns_roce_main.c
++++ b/drivers/infiniband/hw/hns/hns_roce_main.c
+@@ -737,7 +737,7 @@ static int hns_roce_init_hem(struct hns_
+               ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cqc_timer_table,
+                                             HEM_TYPE_CQC_TIMER,
+                                             hr_dev->caps.cqc_timer_entry_sz,
+-                                            hr_dev->caps.num_cqc_timer, 1);
++                                            hr_dev->caps.cqc_timer_bt_num, 1);
+               if (ret) {
+                       dev_err(dev,
+                               "Failed to init CQC timer memory, aborting.\n");

diff --git a/queue-5.17/rdma-rxe-generate-a-completion-for-unsupported-invalid-opcode.patch b/queue-5.17/rdma-rxe-generate-a-completion-for-unsupported-invalid-opcode.patch
new file mode 100644 (file)
index 0000000..d127d60
--- /dev/null
+++ b/queue-5.17/rdma-rxe-generate-a-completion-for-unsupported-invalid-opcode.patch
@@ -0,0 +1,35 @@
+From 2f917af777011c88e977b9b9a5d00b280d3a59ce Mon Sep 17 00:00:00 2001
+From: Xiao Yang <yangx.jy@fujitsu.com>
+Date: Sun, 10 Apr 2022 19:35:13 +0800
+Subject: RDMA/rxe: Generate a completion for unsupported/invalid opcode
+
+From: Xiao Yang <yangx.jy@fujitsu.com>
+
+commit 2f917af777011c88e977b9b9a5d00b280d3a59ce upstream.
+
+Current rxe_requester() doesn't generate a completion when processing an
+unsupported/invalid opcode. If rxe driver doesn't support a new opcode
+(e.g. RDMA Atomic Write) and RDMA library supports it, an application
+using the new opcode can reproduce this issue. Fix the issue by calling
+"goto err;".
+
+Fixes: 8700e3e7c485 ("Soft RoCE driver")
+Link: https://lore.kernel.org/r/20220410113513.27537-1-yangx.jy@fujitsu.com
+Signed-off-by: Xiao Yang <yangx.jy@fujitsu.com>
+Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/infiniband/sw/rxe/rxe_req.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/infiniband/sw/rxe/rxe_req.c
++++ b/drivers/infiniband/sw/rxe/rxe_req.c
+@@ -661,7 +661,7 @@ next_wqe:
+       opcode = next_opcode(qp, wqe, wqe->wr.opcode);
+       if (unlikely(opcode < 0)) {
+               wqe->status = IB_WC_LOC_QP_OP_ERR;
+-              goto exit;
++              goto err;
+       }
+ 
+       mask = rxe_opcode[opcode].mask;

diff --git a/queue-5.17/series b/queue-5.17/series
index 7b4aefd422c4ba6586821265aa1107a39ea327f3..07c0fb0513cf31e8a4fdffaea3527b5d2efb1a2c 100644 (file)
--- a/queue-5.17/series
+++ b/queue-5.17/series
@@ -759,3 +759,5 @@ perf-evlist-extend-arch_evsel__must_be_in_group-to-support-hybrid-systems.patch
 list-test-add-a-test-for-list_is_head.patch
 revert-random-use-static-branch-for-crng_ready.patch
 staging-r8188eu-delete-rtw_wx_read-write32.patch
+rdma-hns-remove-the-num_cqc_timer-variable.patch
+rdma-rxe-generate-a-completion-for-unsupported-invalid-opcode.patch