drm/amdkfd: fix missing L2 cache info in topology

In some ASICs L2 cache info may miss in kfd topology,
because the first bitmap may be empty, that means
the first cu may be inactive, so to find the first
active cu will solve the issue.

v2: Only find the first active cu in the first xcc

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index 28516ae968327ede8a99f0bc461547faef3be6e7..dbc5595e999af533594707b99a74509382809598 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1664,17 +1664,32 @@ static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext,
                                int cache_type, unsigned int cu_processor_id,
                                struct kfd_node *knode)
 {
-       unsigned int cu_sibling_map_mask;
+       unsigned int cu_sibling_map_mask = 0;
        int first_active_cu;
        int i, j, k, xcc, start, end;
        int num_xcc = NUM_XCC(knode->xcc_mask);
        struct kfd_cache_properties *pcache = NULL;
        enum amdgpu_memory_partition mode;
        struct amdgpu_device *adev = knode->adev;
+       bool found = false;
 
        start = ffs(knode->xcc_mask) - 1;
        end = start + num_xcc;
-       cu_sibling_map_mask = cu_info->bitmap[start][0][0];
+
+       /* To find the bitmap in the first active cu in the first
+        * xcc, it is based on the assumption that evrey xcc must
+        * have at least one active cu.
+        */
+       for (i = 0; i < gfx_info->max_shader_engines && !found; i++) {
+               for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) {
+                       if (cu_info->bitmap[start][i % 4][j % 4]) {
+                               cu_sibling_map_mask =
+                                       cu_info->bitmap[start][i % 4][j % 4];
+                               found = true;
+                       }
+               }
+       }
+
        cu_sibling_map_mask &=
                ((1 << pcache_info[cache_type].num_cu_shared) - 1);
        first_active_cu = ffs(cu_sibling_map_mask);