net: stmmac: dwmac-rk: Fix disabling set_clock_selection

On all platforms set_clock_selection() writes to a GRF register. This
requires certain clocks running and thus should happen before the
clocks are disabled.

This has been noticed on RK3576 Sige5, which hangs during system suspend
when trying to suspend the second network interface. Note, that
suspending the first interface works, because the second device ensures
that the necessary clocks for the GRF are enabled.

Cc: stable@vger.kernel.org
Fixes: 2f2b60a0ec28 ("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20251014-rockchip-network-clock-fix-v1-1-c257b4afdf75@collabora.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 51ea0caf16c11d8150e49319f4da4916c125815f..0786816e05f048763c17f2424f351826f9e74f47 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -1446,14 +1446,15 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
                }
        } else {
                if (bsp_priv->clk_enabled) {
+                       if (bsp_priv->ops && bsp_priv->ops->set_clock_selection) {
+                               bsp_priv->ops->set_clock_selection(bsp_priv,
+                                             bsp_priv->clock_input, false);
+                       }
+
                        clk_bulk_disable_unprepare(bsp_priv->num_clks,
                                                   bsp_priv->clks);
                        clk_disable_unprepare(bsp_priv->clk_phy);
 
-                       if (bsp_priv->ops && bsp_priv->ops->set_clock_selection)
-                               bsp_priv->ops->set_clock_selection(bsp_priv,
-                                             bsp_priv->clock_input, false);
-
                        bsp_priv->clk_enabled = false;
                }
        }