--- /dev/null
+From c154a76311293f9671439286834aa325b7ef59fe Mon Sep 17 00:00:00 2001
+From: Christian König <christian.koenig@amd.com>
+Date: Wed, 30 Oct 2013 12:56:04 +0100
+Subject: drm/radeon: activate UVD clocks before sending the destroy msg
+
+From: Christian König <christian.koenig@amd.com>
+
+commit c154a76311293f9671439286834aa325b7ef59fe upstream.
+
+Make sure the UVD clocks are still active before sending
+the destroy message, otherwise the hw might hang.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_uvd.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_uvd.c
++++ b/drivers/gpu/drm/radeon/radeon_uvd.c
+@@ -240,6 +240,8 @@ void radeon_uvd_free_handles(struct rade
+ if (handle != 0 && rdev->uvd.filp[i] == filp) {
+ struct radeon_fence *fence;
+
++ radeon_uvd_note_usage(rdev);
++
+ r = radeon_uvd_get_destroy_msg(rdev,
+ R600_RING_TYPE_UVD_INDEX, handle, &fence);
+ if (r) {
--- /dev/null
+From 70471860ff9f335c60c004d42ebd48945bfa5403 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Thu, 31 Oct 2013 16:43:27 -0400
+Subject: drm/radeon: don't share PPLLs on DCE4.1
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 70471860ff9f335c60c004d42ebd48945bfa5403 upstream.
+
+Sharing PPLLs seems to cause problems on some boards.
+
+Bug:
+https://bugs.freedesktop.org/show_bug.cgi?id=45334
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_crtc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_crtc.c
++++ b/drivers/gpu/drm/radeon/atombios_crtc.c
+@@ -1753,7 +1753,7 @@ static int radeon_atom_pick_pll(struct d
+ if (pll != ATOM_PPLL_INVALID)
+ return pll;
+ }
+- } else {
++ } else if (!ASIC_IS_DCE41(rdev)) { /* Don't share PLLs on DCE4.1 chips */
+ /* use the same PPLL for all monitors with the same clock */
+ pll = radeon_get_shared_nondp_ppll(crtc);
+ if (pll != ATOM_PPLL_INVALID)
--- /dev/null
+From 727ddc84a1373bf06b2fa261f44e38fb0faf5340 Mon Sep 17 00:00:00 2001
+From: Christian König <christian.koenig@amd.com>
+Date: Wed, 30 Oct 2013 12:56:05 +0100
+Subject: drm/radeon: fix UVD destroy IB size
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 727ddc84a1373bf06b2fa261f44e38fb0faf5340 upstream.
+
+The parameter is in bytes not dwords.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_uvd.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_uvd.c
++++ b/drivers/gpu/drm/radeon/radeon_uvd.c
+@@ -622,7 +622,7 @@ static int radeon_uvd_send_msg(struct ra
+ if (r)
+ goto err;
+
+- r = radeon_ib_get(rdev, ring, &ib, NULL, 16);
++ r = radeon_ib_get(rdev, ring, &ib, NULL, 64);
+ if (r)
+ goto err;
+
--- /dev/null
+From d5693761b2b4ff530c8af8af9ec55b6eae76e617 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 28 Oct 2013 10:56:23 -0400
+Subject: drm/radeon/si: fix define for MC_SEQ_TRAIN_WAKEUP_CNTL
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit d5693761b2b4ff530c8af8af9ec55b6eae76e617 upstream.
+
+Typo in the register offset.
+
+Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/sid.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/sid.h
++++ b/drivers/gpu/drm/radeon/sid.h
+@@ -478,7 +478,7 @@
+ #define STATE3_MASK (0x1f << 15)
+ #define STATE3_SHIFT 15
+
+-#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x2808
++#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x28e8
+ #define TRAIN_DONE_D0 (1 << 30)
+ #define TRAIN_DONE_D1 (1 << 31)
+
--- /dev/null
+From fae009d15a44e5f1d938340facf4b8bc7dc69a09 Mon Sep 17 00:00:00 2001
+From: Jerome Glisse <jglisse@redhat.com>
+Date: Wed, 6 Nov 2013 17:42:02 -0500
+Subject: radeon/i2c: do not count reg index in number of i2c byte we are writing.
+
+From: Jerome Glisse <jglisse@redhat.com>
+
+commit fae009d15a44e5f1d938340facf4b8bc7dc69a09 upstream.
+
+Useless to count the register index in number of bytes we are writing.
+
+Fixes a regression with hw i2c enabled.
+
+Signed-off-by: Jerome Glisse <jglisse@redhat.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_i2c.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_i2c.c
++++ b/drivers/gpu/drm/radeon/atombios_i2c.c
+@@ -56,8 +56,10 @@ static int radeon_process_i2c_ch(struct
+ return -EINVAL;
+ }
+ args.ucRegIndex = buf[0];
+- if (num > 1)
+- memcpy(&out, &buf[1], num - 1);
++ if (num > 1) {
++ num--;
++ memcpy(&out, &buf[1], num);
++ }
+ args.lpI2CDataOut = cpu_to_le16(out);
+ } else {
+ if (num > ATOM_MAX_HW_I2C_READ) {
drm-i915-restore-the-early-forcewake-cleanup.patch
drm-i915-replicate-bios-edp-bpp-clamping-hack-for-hsw.patch
drm-nouveau-when-bailing-out-of-a-pushbuf-ioctl-do-not-remove-previous-fence.patch
+drm-radeon-si-fix-define-for-mc_seq_train_wakeup_cntl.patch
+drm-radeon-activate-uvd-clocks-before-sending-the-destroy-msg.patch
+drm-radeon-fix-uvd-destroy-ib-size.patch
+drm-radeon-don-t-share-pplls-on-dce4.1.patch
+radeon-i2c-do-not-count-reg-index-in-number-of-i2c-byte-we-are-writing.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
