]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
mmc: am654_sdhci: Add am654_sdhci_set_control_reg
authorJudith Mendez <jm@ti.com>
Thu, 17 Apr 2025 23:43:33 +0000 (18:43 -0500)
committerTom Rini <trini@konsulko.com>
Thu, 24 Apr 2025 16:44:52 +0000 (10:44 -0600)
This patch adds am654_sdhci_set_control_reg to am654_sdhci.

This is required to fix UHS_MODE_SELECT for TI K3 boards.

If any of HIGH_SPEED_ENA, V1P8_SIGNAL_ENA, UHS_MODE_SELECT
are set, then data will be launched on the pos-edge of the
clock.

Since K3 SoCs did not meet timing requirements for High Speed
SDR mode at rising clock edge, none of these three should be
set, therefore limit UHS_MODE_SELECT to only be set for modes
above MMC_HS_52.

This fixes MMC write issue on am64x evm at mode High Speed
SDR.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
drivers/mmc/am654_sdhci.c
drivers/mmc/sdhci.c
include/sdhci.h

index 28d82afd0129ded1d64f7b2f0323ddfa47f0578e..0df3568f073bcada37a612f574c01fdb5f6a1ca1 100644 (file)
@@ -523,13 +523,24 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode)
        return 0;
 }
 #endif
+
+void am654_sdhci_set_control_reg(struct sdhci_host *host)
+{
+       struct mmc *mmc = host->mmc;
+
+       sdhci_set_voltage(host);
+
+       if (mmc->selected_mode > MMC_HS_52)
+               sdhci_set_uhs_timing(host);
+}
+
 const struct sdhci_ops am654_sdhci_ops = {
 #if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .platform_execute_tuning = am654_sdhci_execute_tuning,
 #endif
        .deferred_probe         = am654_sdhci_deferred_probe,
        .set_ios_post           = &am654_sdhci_set_ios_post,
-       .set_control_reg        = sdhci_set_control_reg,
+       .set_control_reg        = am654_sdhci_set_control_reg,
        .write_b                = am654_sdhci_write_b,
 };
 
@@ -589,7 +600,7 @@ const struct sdhci_ops j721e_4bit_sdhci_ops = {
 #endif
        .deferred_probe         = am654_sdhci_deferred_probe,
        .set_ios_post           = &j721e_4bit_sdhci_set_ios_post,
-       .set_control_reg        = sdhci_set_control_reg,
+       .set_control_reg        = am654_sdhci_set_control_reg,
        .write_b                = am654_sdhci_write_b,
 };
 
index dc7f0724a7b60fedc9518377a1db1c0a58b37304..648dfa4b5efb712e01793fb26e1eb2361a07bfc8 100644 (file)
@@ -549,7 +549,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host)
        sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
 }
 
-static void sdhci_set_voltage(struct sdhci_host *host)
+void sdhci_set_voltage(struct sdhci_host *host)
 {
        if (IS_ENABLED(CONFIG_MMC_IO_VOLTAGE)) {
                struct mmc *mmc = (struct mmc *)host->mmc;
index 31a49ca6a2f8b7efdb67a77ae8f147167998e49d..2372697b7435d07b2fd9b913c3e0d5f790e953ff 100644 (file)
@@ -518,6 +518,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host);
 /* Export the operations to drivers */
 int sdhci_probe(struct udevice *dev);
 int sdhci_set_clock(struct mmc *mmc, unsigned int clock);
+void sdhci_set_voltage(struct sdhci_host *host);
 
 /**
  * sdhci_set_control_reg - Set control registers