]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
mtd: spinand: winbond: Fix W35N number of planes/LUN
authorMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 18 Jun 2025 08:47:58 +0000 (10:47 +0200)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 18 Jun 2025 09:18:45 +0000 (11:18 +0200)
There's been a mistake when extracting the geometry of the W35N02 and
W35N04 chips from the datasheet. There is a single plane, however there
are respectively 2 and 4 LUNs. They are actually referred in the
datasheet as dies (equivalent of target), but as there is no die select
operation and the chips only feature a single configuration register for
the entire chip (instead of one per die), we can reasonably assume we
are talking about LUNs and not dies.

Reported-by: Andreas Dannenberg <dannenberg@ti.com>
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Fixes: 25e08bf66660 ("mtd: spinand: winbond: Add support for W35N02JW and W35N04JW chips")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/mtd/nand/spi/winbond.c

index 19f8dd4a63707e6599068a43fd80dabcd9dd3a57..2808bbd7a16ee9add09af4028f9292aa9bbc7897 100644 (file)
@@ -289,7 +289,7 @@ static const struct spinand_info winbond_spinand_table[] = {
                     SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)),
        SPINAND_INFO("W35N02JW", /* 1.8V */
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
-                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 2, 1, 1),
+                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
                     NAND_ECCREQ(1, 512),
                     SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
                                              &write_cache_octal_variants,
@@ -298,7 +298,7 @@ static const struct spinand_info winbond_spinand_table[] = {
                     SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)),
        SPINAND_INFO("W35N04JW", /* 1.8V */
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
-                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 4, 1, 1),
+                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
                     NAND_ECCREQ(1, 512),
                     SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
                                              &write_cache_octal_variants,