]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
clk: zynqmp: Use firmware specific common clock flags
authorRajan Vaja <rajan.vaja@xilinx.com>
Mon, 28 Jun 2021 07:01:19 +0000 (00:01 -0700)
committerStephen Boyd <sboyd@kernel.org>
Tue, 29 Jun 2021 06:35:36 +0000 (23:35 -0700)
Currently firmware passes CCF specific flags to ZynqMP clock driver.
So firmware needs to be updated if CCF flags are changed. The firmware
should have its own 'flag number space' that is distinct from the
common clk framework's 'flag number space'. So define and use ZynqMP
specific common clock flags instead of using CCF flags.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210628070122.26217-2-rajan.vaja@xilinx.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/zynqmp/clk-gate-zynqmp.c
drivers/clk/zynqmp/clk-mux-zynqmp.c
drivers/clk/zynqmp/clk-zynqmp.h
drivers/clk/zynqmp/clkc.c
drivers/clk/zynqmp/divider.c
drivers/clk/zynqmp/pll.c

index 10c9b889324f26b53034eed54e716d937c638f6f..695feaa82da5f1cc4075463543414fb684e2cc86 100644 (file)
@@ -121,7 +121,9 @@ struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
 
        init.name = name;
        init.ops = &zynqmp_clk_gate_ops;
-       init.flags = nodes->flag;
+
+       init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag);
+
        init.parent_names = parents;
        init.num_parents = 1;
 
index d576c900dee06513b3782c77c0961dc354b2c6bb..42ad324b1c6410760bed6f09a08d71bc6d5ac92c 100644 (file)
@@ -126,7 +126,9 @@ struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
                init.ops = &zynqmp_clk_mux_ro_ops;
        else
                init.ops = &zynqmp_clk_mux_ops;
-       init.flags = nodes->flag;
+
+       init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag);
+
        init.parent_names = parents;
        init.num_parents = num_parents;
        mux->flags = nodes->type_flag;
index 5beeb41b29fa126e550a680e4f3c5ecca41022cb..aa013a59c7cc1d835fb380c83af6fe62a4f8eca2 100644 (file)
 
 #include <linux/firmware/xlnx-zynqmp.h>
 
+/* Common Flags */
+/* must be gated across rate change */
+#define ZYNQMP_CLK_SET_RATE_GATE       BIT(0)
+/* must be gated across re-parent */
+#define ZYNQMP_CLK_SET_PARENT_GATE     BIT(1)
+/* propagate rate change up one level */
+#define ZYNQMP_CLK_SET_RATE_PARENT     BIT(2)
+/* do not gate even if unused */
+#define ZYNQMP_CLK_IGNORE_UNUSED       BIT(3)
+/* don't re-parent on rate change */
+#define ZYNQMP_CLK_SET_RATE_NO_REPARENT        BIT(7)
+/* do not gate, ever */
+#define ZYNQMP_CLK_IS_CRITICAL         BIT(11)
+
 enum topology_type {
        TYPE_INVALID,
        TYPE_MUX,
@@ -33,6 +47,8 @@ struct clock_topology {
        u8 custom_type_flag;
 };
 
+unsigned long zynqmp_clk_map_common_ccf_flags(const u32 zynqmp_flag);
+
 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
                                       const char * const *parents,
                                       u8 num_parents,
index db8d0d7161ce2cf233925057f96e7013a38f8925..871184e406e1e42b339209581122eccbdbbc686e 100644 (file)
@@ -271,6 +271,26 @@ static int zynqmp_pm_clock_get_topology(u32 clock_id, u32 index,
        return ret;
 }
 
+unsigned long zynqmp_clk_map_common_ccf_flags(const u32 zynqmp_flag)
+{
+       unsigned long ccf_flag = 0;
+
+       if (zynqmp_flag & ZYNQMP_CLK_SET_RATE_GATE)
+               ccf_flag |= CLK_SET_RATE_GATE;
+       if (zynqmp_flag & ZYNQMP_CLK_SET_PARENT_GATE)
+               ccf_flag |= CLK_SET_PARENT_GATE;
+       if (zynqmp_flag & ZYNQMP_CLK_SET_RATE_PARENT)
+               ccf_flag |= CLK_SET_RATE_PARENT;
+       if (zynqmp_flag & ZYNQMP_CLK_IGNORE_UNUSED)
+               ccf_flag |= CLK_IGNORE_UNUSED;
+       if (zynqmp_flag & ZYNQMP_CLK_SET_RATE_NO_REPARENT)
+               ccf_flag |= CLK_SET_RATE_NO_REPARENT;
+       if (zynqmp_flag & ZYNQMP_CLK_IS_CRITICAL)
+               ccf_flag |= CLK_IS_CRITICAL;
+
+       return ccf_flag;
+}
+
 /**
  * zynqmp_clk_register_fixed_factor() - Register fixed factor with the
  *                                     clock framework
@@ -292,6 +312,7 @@ struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id,
        struct zynqmp_pm_query_data qdata = {0};
        u32 ret_payload[PAYLOAD_ARG_CNT];
        int ret;
+       unsigned long flag;
 
        qdata.qid = PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS;
        qdata.arg1 = clk_id;
@@ -303,9 +324,11 @@ struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id,
        mult = ret_payload[1];
        div = ret_payload[2];
 
+       flag = zynqmp_clk_map_common_ccf_flags(nodes->flag);
+
        hw = clk_hw_register_fixed_factor(NULL, name,
                                          parents[0],
-                                         nodes->flag, mult,
+                                         flag, mult,
                                          div);
 
        return hw;
index e9bf7958b8218e0ff58108dfd6724ed3a9bfd24c..0becdc0a8bff501a9f0759b6c516318f89652e0b 100644 (file)
@@ -312,8 +312,9 @@ struct clk_hw *zynqmp_clk_register_divider(const char *name,
 
        init.name = name;
        init.ops = &zynqmp_clk_divider_ops;
-       /* CLK_FRAC is not defined in the common clk framework */
-       init.flags = nodes->flag & ~CLK_FRAC;
+
+       init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag);
+
        init.parent_names = parents;
        init.num_parents = 1;
 
index 793b950ade0900a0656b2fba633375a87469921d..036e4ff64a2f7b98e0c97239f3d38b823c9725b4 100644 (file)
@@ -322,7 +322,9 @@ struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
 
        init.name = name;
        init.ops = &zynqmp_pll_ops;
-       init.flags = nodes->flag;
+
+       init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag);
+
        init.parent_names = parents;
        init.num_parents = 1;