]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
fixes for 4.14
authorSasha Levin <sashal@kernel.org>
Wed, 13 Nov 2019 02:36:26 +0000 (21:36 -0500)
committerSasha Levin <sashal@kernel.org>
Wed, 13 Nov 2019 02:36:26 +0000 (21:36 -0500)
Signed-off-by: Sasha Levin <sashal@kernel.org>
queue-4.14/kvm-mmu-don-t-read-pdptes-when-paging-is-not-enabled.patch [new file with mode: 0644]
queue-4.14/kvm-x86-introduce-is_pae_paging.patch [new file with mode: 0644]
queue-4.14/series [new file with mode: 0644]

diff --git a/queue-4.14/kvm-mmu-don-t-read-pdptes-when-paging-is-not-enabled.patch b/queue-4.14/kvm-mmu-don-t-read-pdptes-when-paging-is-not-enabled.patch
new file mode 100644 (file)
index 0000000..48a5312
--- /dev/null
@@ -0,0 +1,45 @@
+From bca93da30d61fae34045cc1918c9b289e7973b46 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 11 Nov 2019 15:37:17 -0800
+Subject: kvm: mmu: Don't read PDPTEs when paging is not enabled
+
+From: Junaid Shahid <junaids@google.com>
+
+[ Upstream commit d35b34a9a70edae7ef923f100e51b8b5ae9fe899 ]
+
+kvm should not attempt to read guest PDPTEs when CR0.PG = 0 and
+CR4.PAE = 1.
+
+Signed-off-by: Junaid Shahid <junaids@google.com>
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kvm/x86.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
+index dcee3282112dc..dc1b6d5bb16d6 100644
+--- a/arch/x86/kvm/x86.c
++++ b/arch/x86/kvm/x86.c
+@@ -620,7 +620,7 @@ bool pdptrs_changed(struct kvm_vcpu *vcpu)
+       gfn_t gfn;
+       int r;
+-      if (is_long_mode(vcpu) || !is_pae(vcpu))
++      if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
+               return false;
+       if (!test_bit(VCPU_EXREG_PDPTR,
+@@ -7787,7 +7787,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
+               kvm_update_cpuid(vcpu);
+       idx = srcu_read_lock(&vcpu->kvm->srcu);
+-      if (!is_long_mode(vcpu) && is_pae(vcpu)) {
++      if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
+               load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
+               mmu_reset_needed = 1;
+       }
+-- 
+2.20.1
+
diff --git a/queue-4.14/kvm-x86-introduce-is_pae_paging.patch b/queue-4.14/kvm-x86-introduce-is_pae_paging.patch
new file mode 100644 (file)
index 0000000..3b1f425
--- /dev/null
@@ -0,0 +1,112 @@
+From abd53760d6d39121e644c4f1b051f34d15566d5a Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 11 Nov 2019 15:37:18 -0800
+Subject: KVM: x86: introduce is_pae_paging
+
+From: Paolo Bonzini <pbonzini@redhat.com>
+
+[ Upstream commit bf03d4f9334728bf7c8ffc7de787df48abd6340e ]
+
+Checking for 32-bit PAE is quite common around code that fiddles with
+the PDPTRs.  Add a function to compress all checks into a single
+invocation.
+
+Moving to the common helper also fixes a subtle bug in kvm_set_cr3()
+where it fails to check is_long_mode() and results in KVM incorrectly
+attempting to load PDPTRs for a 64-bit guest.
+
+Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+[sean: backport to 4.x; handle vmx.c split in 5.x, call out the bugfix]
+Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kvm/vmx.c | 7 +++----
+ arch/x86/kvm/x86.c | 8 ++++----
+ arch/x86/kvm/x86.h | 5 +++++
+ 3 files changed, 12 insertions(+), 8 deletions(-)
+
+diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
+index cd5a8e888eb6b..ab6384efc7916 100644
+--- a/arch/x86/kvm/vmx.c
++++ b/arch/x86/kvm/vmx.c
+@@ -4468,7 +4468,7 @@ static void ept_load_pdptrs(struct kvm_vcpu *vcpu)
+                     (unsigned long *)&vcpu->arch.regs_dirty))
+               return;
+-      if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
++      if (is_pae_paging(vcpu)) {
+               vmcs_write64(GUEST_PDPTR0, mmu->pdptrs[0]);
+               vmcs_write64(GUEST_PDPTR1, mmu->pdptrs[1]);
+               vmcs_write64(GUEST_PDPTR2, mmu->pdptrs[2]);
+@@ -4480,7 +4480,7 @@ static void ept_save_pdptrs(struct kvm_vcpu *vcpu)
+ {
+       struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
+-      if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
++      if (is_pae_paging(vcpu)) {
+               mmu->pdptrs[0] = vmcs_read64(GUEST_PDPTR0);
+               mmu->pdptrs[1] = vmcs_read64(GUEST_PDPTR1);
+               mmu->pdptrs[2] = vmcs_read64(GUEST_PDPTR2);
+@@ -10906,8 +10906,7 @@ static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool ne
+                * If PAE paging and EPT are both on, CR3 is not used by the CPU and
+                * must not be dereferenced.
+                */
+-              if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu) &&
+-                  !nested_ept) {
++              if (is_pae_paging(vcpu) && !nested_ept) {
+                       if (!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3)) {
+                               *entry_failure_code = ENTRY_FAIL_PDPTE;
+                               return 1;
+diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
+index dc1b6d5bb16d6..1f9360320a82c 100644
+--- a/arch/x86/kvm/x86.c
++++ b/arch/x86/kvm/x86.c
+@@ -620,7 +620,7 @@ bool pdptrs_changed(struct kvm_vcpu *vcpu)
+       gfn_t gfn;
+       int r;
+-      if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
++      if (!is_pae_paging(vcpu))
+               return false;
+       if (!test_bit(VCPU_EXREG_PDPTR,
+@@ -849,8 +849,8 @@ int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
+       if (is_long_mode(vcpu) &&
+           (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
+               return 1;
+-      else if (is_pae(vcpu) && is_paging(vcpu) &&
+-                 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
++      else if (is_pae_paging(vcpu) &&
++               !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
+               return 1;
+       vcpu->arch.cr3 = cr3;
+@@ -7787,7 +7787,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
+               kvm_update_cpuid(vcpu);
+       idx = srcu_read_lock(&vcpu->kvm->srcu);
+-      if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
++      if (is_pae_paging(vcpu)) {
+               load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
+               mmu_reset_needed = 1;
+       }
+diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
+index c88305d997b0f..68eb0d03e5fc3 100644
+--- a/arch/x86/kvm/x86.h
++++ b/arch/x86/kvm/x86.h
+@@ -94,6 +94,11 @@ static inline int is_paging(struct kvm_vcpu *vcpu)
+       return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
+ }
++static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
++{
++      return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
++}
++
+ static inline u32 bit(int bitno)
+ {
+       return 1 << (bitno & 31);
+-- 
+2.20.1
+
diff --git a/queue-4.14/series b/queue-4.14/series
new file mode 100644 (file)
index 0000000..7a0832d
--- /dev/null
@@ -0,0 +1,2 @@
+kvm-mmu-don-t-read-pdptes-when-paging-is-not-enabled.patch
+kvm-x86-introduce-is_pae_paging.patch