--- /dev/null
+From 6af0a549c25e0d02366aa95507bfe3cad2f7b68b Mon Sep 17 00:00:00 2001
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+Date: Mon, 18 Nov 2019 14:20:16 +0200
+Subject: ARM: dts: dra7: fix cpsw mdio fck clock
+
+From: Grygorii Strashko <grygorii.strashko@ti.com>
+
+commit 6af0a549c25e0d02366aa95507bfe3cad2f7b68b upstream.
+
+The DRA7 CPSW MDIO functional clock (gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0)
+is specified incorrectly, which is caused incorrect MDIO bus clock
+configuration MDCLK. The correct CPSW MDIO functional clock is
+gmac_main_clk (125MHz), which is the same as CPSW fck. Hence fix it.
+
+Fixes: 1faa415c9c6e ("ARM: dts: Add fck for cpsw mdio for omap variants")
+Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/dra7-l4.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/dra7-l4.dtsi
++++ b/arch/arm/boot/dts/dra7-l4.dtsi
+@@ -3059,7 +3059,7 @@
+
+ davinci_mdio: mdio@1000 {
+ compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+- clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0>;
++ clocks = <&gmac_main_clk>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <0>;
--- /dev/null
+From 3e5c3c41ae925458150273e2f74ffbf999530c5f Mon Sep 17 00:00:00 2001
+From: Tony Lindgren <tony@atomide.com>
+Date: Sun, 24 Nov 2019 09:43:16 -0800
+Subject: ARM: dts: Fix sgx sysconfig register for omap4
+
+From: Tony Lindgren <tony@atomide.com>
+
+commit 3e5c3c41ae925458150273e2f74ffbf999530c5f upstream.
+
+Looks like we've had the sgx sysconfig register and revision register
+always wrong for omap4, including the old platform data. Let's fix the
+offsets to what the TRM says. Otherwise the sgx module may never idle
+depending on the state of the real sysconfig register.
+
+Fixes: d23a163ebe5a ("ARM: dts: Add nodes for missing omap4 interconnect target modules")
+Cc: H. Nikolaus Schaller <hns@goldelico.com>
+Cc: Merlijn Wajer <merlijn@wizzup.org>
+Cc: Pavel Machek <pavel@ucw.cz>
+Cc: Sebastian Reichel <sre@kernel.org>
+Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/omap4.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/omap4.dtsi
++++ b/arch/arm/boot/dts/omap4.dtsi
+@@ -330,8 +330,8 @@
+
+ target-module@56000000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+- reg = <0x5601fc00 0x4>,
+- <0x5601fc10 0x4>;
++ reg = <0x5600fe00 0x4>,
++ <0x5600fe10 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
--- /dev/null
+From 0ccafdf3e81bb40fe415ea13e1f42b19c585f0a0 Mon Sep 17 00:00:00 2001
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+Date: Mon, 4 Nov 2019 11:54:04 +0000
+Subject: ARM: dts: imx6ul-kontron-n6310-s: Disable the snvs-poweroff driver
+
+From: Frieder Schrempf <frieder.schrempf@kontron.de>
+
+commit 0ccafdf3e81bb40fe415ea13e1f42b19c585f0a0 upstream.
+
+The snvs-poweroff driver can power off the system by pulling the
+PMIC_ON_REQ signal low, to let the PMIC disable the power.
+The Kontron SoMs do not have this signal connected, so let's remove
+the node.
+
+This fixes a real issue when the signal is asserted at poweroff,
+but not actually causing the power to turn off. It was observed,
+that in this case the system would not shut down properly.
+
+Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards")
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
++++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
+@@ -157,10 +157,6 @@
+ status = "okay";
+ };
+
+-&snvs_poweroff {
+- status = "okay";
+-};
+-
+ &uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
--- /dev/null
+From 6b832a148717f1718f57805a9a4aa7f092582d15 Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Tue, 5 Nov 2019 11:06:51 +0000
+Subject: arm64: dts: allwinner: a64: Re-add PMU node
+
+From: Andre Przywara <andre.przywara@arm.com>
+
+commit 6b832a148717f1718f57805a9a4aa7f092582d15 upstream.
+
+As it was found recently, the Performance Monitoring Unit (PMU) on the
+Allwinner A64 SoC was not generating (the right) interrupts. With the
+SPI numbers from the manual the kernel did not receive any overflow
+interrupts, so perf was not happy at all.
+It turns out that the numbers were just off by 4, so the PMU interrupts
+are from 148 to 151, not from 152 to 155 as the manual describes.
+
+This was found by playing around with U-Boot, which typically does not
+use interrupts, so the GIC is fully available for experimentation:
+With *every* PPI and SPI enabled, an overflowing PMU cycle counter was
+found to set a bit in one of the GICD_ISPENDR registers, with careful
+counting this was determined to be number 148.
+
+Tested with perf record and perf top on a Pine64-LTS. Also tested with
+tasksetting to every core to confirm the assignment between IRQs and
+cores.
+
+This somewhat "revert-fixes" commit ed3e9406bcbc ("arm64: dts: allwinner:
+a64: Drop PMU node").
+
+Fixes: 34a97fcc71c2 ("arm64: dts: allwinner: a64: Add PMU node")
+Fixes: ed3e9406bcbc ("arm64: dts: allwinner: a64: Drop PMU node")
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -142,6 +142,15 @@
+ clock-output-names = "ext-osc32k";
+ };
+
++ pmu {
++ compatible = "arm,cortex-a53-pmu";
++ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
++ };
++
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
--- /dev/null
+From e8b395b23643ca26e62a3081130d895e198c6154 Mon Sep 17 00:00:00 2001
+From: "S.j. Wang" <shengjiu.wang@nxp.com>
+Date: Wed, 16 Oct 2019 10:36:05 +0000
+Subject: arm64: dts: imx8mm-evk: Assigned clocks for audio plls
+
+From: S.j. Wang <shengjiu.wang@nxp.com>
+
+commit e8b395b23643ca26e62a3081130d895e198c6154 upstream.
+
+Assign clocks and clock-rates for audio plls, that audio
+drivers can utilize them.
+
+Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524,
+that sai driver can generate correct bit clock.
+
+Fixes: 13f3b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec wm8524")
+Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
+Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
+Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
+ arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++--
+ 2 files changed, 8 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
+@@ -62,6 +62,8 @@
+
+ cpudai: simple-audio-card,cpu {
+ sound-dai = <&sai3>;
++ dai-tdm-slot-num = <2>;
++ dai-tdm-slot-width = <32>;
+ };
+
+ simple-audio-card,codec {
+--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+@@ -479,14 +479,18 @@
+ <&clk IMX8MM_CLK_AUDIO_AHB>,
+ <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
+ <&clk IMX8MM_SYS_PLL3>,
+- <&clk IMX8MM_VIDEO_PLL1>;
++ <&clk IMX8MM_VIDEO_PLL1>,
++ <&clk IMX8MM_AUDIO_PLL1>,
++ <&clk IMX8MM_AUDIO_PLL2>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
+ <&clk IMX8MM_SYS_PLL1_800M>;
+ assigned-clock-rates = <0>,
+ <400000000>,
+ <400000000>,
+ <750000000>,
+- <594000000>;
++ <594000000>,
++ <393216000>,
++ <361267200>;
+ };
+
+ src: reset-controller@30390000 {
--- /dev/null
+From 39a1a8941b27c37f79508426e27a2ec29829d66c Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Tue, 19 Nov 2019 12:03:31 +0000
+Subject: arm64: dts: juno: Fix UART frequency
+
+From: Andre Przywara <andre.przywara@arm.com>
+
+commit 39a1a8941b27c37f79508426e27a2ec29829d66c upstream.
+
+Older versions of the Juno *SoC* TRM [1] recommended that the UART clock
+source should be 7.2738 MHz, whereas the *system* TRM [2] stated a more
+correct value of 7.3728 MHz. Somehow the wrong value managed to end up in
+our DT.
+
+Doing a prime factorisation, a modulo divide by 115200 and trying
+to buy a 7.2738 MHz crystal at your favourite electronics dealer suggest
+that the old value was actually a typo. The actual UART clock is driven
+by a PLL, configured via a parameter in some board.txt file in the
+firmware, which reads 7.37 MHz (sic!).
+
+Fix this to correct the baud rate divisor calculation on the Juno board.
+
+[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0515b.b/DDI0515B_b_juno_arm_development_platform_soc_trm.pdf
+[2] http://infocenter.arm.com/help/topic/com.arm.doc.100113_0000_07_en/arm_versatile_express_juno_development_platform_(v2m_juno)_technical_reference_manual_100113_0000_07_en.pdf
+
+Fixes: 71f867ec130e ("arm64: Add Juno board device tree.")
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Acked-by: Liviu Dudau <liviu.dudau@arm.com>
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/arm/juno-clocks.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/arm/juno-clocks.dtsi
++++ b/arch/arm64/boot/dts/arm/juno-clocks.dtsi
+@@ -8,10 +8,10 @@
+ */
+ / {
+ /* SoC fixed clocks */
+- soc_uartclk: refclk7273800hz {
++ soc_uartclk: refclk7372800hz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+- clock-frequency = <7273800>;
++ clock-frequency = <7372800>;
+ clock-output-names = "juno:uartclk";
+ };
+
--- /dev/null
+From e231c6d47cca4b5df51bcf72dec1af767e63feaf Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:19 +0200
+Subject: arm64: dts: marvell: Add AP806-dual missing CPU clocks
+
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+
+commit e231c6d47cca4b5df51bcf72dec1af767e63feaf upstream.
+
+CPU clocks have been added to AP806-quad but not to the -dual
+variant.
+
+Fixes: c00bc38354cf ("arm64: dts: marvell: Add cpu clock node on Armada 7K/8K")
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
++++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
+@@ -21,6 +21,7 @@
+ reg = <0x000>;
+ enable-method = "psci";
+ #cooling-cells = <2>;
++ clocks = <&cpu_clk 0>;
+ };
+ cpu1: cpu@1 {
+ device_type = "cpu";
+@@ -28,6 +29,7 @@
+ reg = <0x001>;
+ enable-method = "psci";
+ #cooling-cells = <2>;
++ clocks = <&cpu_clk 0>;
+ };
+ };
+ };
--- /dev/null
+From 2bc26088ba37d4f2a4b8bd813ee757992522d082 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:28 +0200
+Subject: arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment alignment
+
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+
+commit 2bc26088ba37d4f2a4b8bd813ee757992522d082 upstream.
+
+Fix this tiny typo before renaming/changing this file.
+
+Fixes: 72a3713fadfd ("arm64: dts: marvell: de-duplicate CP110 description")
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
++++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+@@ -438,10 +438,10 @@
+
+ CP110_LABEL(nand_controller): nand@720000 {
+ /*
+- * Due to the limitation of the pins available
+- * this controller is only usable on the CPM
+- * for A7K and on the CPS for A8K.
+- */
++ * Due to the limitation of the pins available
++ * this controller is only usable on the CPM
++ * for A7K and on the CPS for A8K.
++ */
+ compatible = "marvell,armada-8k-nand-controller",
+ "marvell,armada370-nand-controller";
+ reg = <0x720000 0x54>;
--- /dev/null
+From 301b94d434ac3a3cd576a4bc1053cc243d6bd841 Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Thu, 5 Sep 2019 14:59:52 +0200
+Subject: arm64: dts: meson: axg: fix audio fifo reg size
+
+From: Jerome Brunet <jbrunet@baylibre.com>
+
+commit 301b94d434ac3a3cd576a4bc1053cc243d6bd841 upstream.
+
+The register region size initially is too small to access all
+the fifo registers.
+
+Fixes: f2b8f6a93357 ("arm64: dts: meson-axg: add audio fifos")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+@@ -1162,7 +1162,7 @@
+
+ toddr_a: audio-controller@100 {
+ compatible = "amlogic,axg-toddr";
+- reg = <0x0 0x100 0x0 0x1c>;
++ reg = <0x0 0x100 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TODDR_A";
+ interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
+@@ -1173,7 +1173,7 @@
+
+ toddr_b: audio-controller@140 {
+ compatible = "amlogic,axg-toddr";
+- reg = <0x0 0x140 0x0 0x1c>;
++ reg = <0x0 0x140 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TODDR_B";
+ interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
+@@ -1184,7 +1184,7 @@
+
+ toddr_c: audio-controller@180 {
+ compatible = "amlogic,axg-toddr";
+- reg = <0x0 0x180 0x0 0x1c>;
++ reg = <0x0 0x180 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TODDR_C";
+ interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
+@@ -1195,7 +1195,7 @@
+
+ frddr_a: audio-controller@1c0 {
+ compatible = "amlogic,axg-frddr";
+- reg = <0x0 0x1c0 0x0 0x1c>;
++ reg = <0x0 0x1c0 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "FRDDR_A";
+ interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
+@@ -1206,7 +1206,7 @@
+
+ frddr_b: audio-controller@200 {
+ compatible = "amlogic,axg-frddr";
+- reg = <0x0 0x200 0x0 0x1c>;
++ reg = <0x0 0x200 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "FRDDR_B";
+ interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
+@@ -1217,7 +1217,7 @@
+
+ frddr_c: audio-controller@240 {
+ compatible = "amlogic,axg-frddr";
+- reg = <0x0 0x240 0x0 0x1c>;
++ reg = <0x0 0x240 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "FRDDR_C";
+ interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
--- /dev/null
+From 22c4b148a0a1085e57a470e6f7dc515cf08f5a5c Mon Sep 17 00:00:00 2001
+From: Jerome Brunet <jbrunet@baylibre.com>
+Date: Thu, 5 Sep 2019 14:59:53 +0200
+Subject: arm64: dts: meson: g12: fix audio fifo reg size
+
+From: Jerome Brunet <jbrunet@baylibre.com>
+
+commit 22c4b148a0a1085e57a470e6f7dc515cf08f5a5c upstream.
+
+The register region size initially is too small to access all
+the fifo registers.
+
+Fixes: c59b7fe5aafd ("arm64: dts: meson: g12a: add audio fifos")
+Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+@@ -1509,7 +1509,7 @@
+ toddr_a: audio-controller@100 {
+ compatible = "amlogic,g12a-toddr",
+ "amlogic,axg-toddr";
+- reg = <0x0 0x100 0x0 0x1c>;
++ reg = <0x0 0x100 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TODDR_A";
+ interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
+@@ -1521,7 +1521,7 @@
+ toddr_b: audio-controller@140 {
+ compatible = "amlogic,g12a-toddr",
+ "amlogic,axg-toddr";
+- reg = <0x0 0x140 0x0 0x1c>;
++ reg = <0x0 0x140 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TODDR_B";
+ interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
+@@ -1533,7 +1533,7 @@
+ toddr_c: audio-controller@180 {
+ compatible = "amlogic,g12a-toddr",
+ "amlogic,axg-toddr";
+- reg = <0x0 0x180 0x0 0x1c>;
++ reg = <0x0 0x180 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "TODDR_C";
+ interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
+@@ -1545,7 +1545,7 @@
+ frddr_a: audio-controller@1c0 {
+ compatible = "amlogic,g12a-frddr",
+ "amlogic,axg-frddr";
+- reg = <0x0 0x1c0 0x0 0x1c>;
++ reg = <0x0 0x1c0 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "FRDDR_A";
+ interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
+@@ -1557,7 +1557,7 @@
+ frddr_b: audio-controller@200 {
+ compatible = "amlogic,g12a-frddr",
+ "amlogic,axg-frddr";
+- reg = <0x0 0x200 0x0 0x1c>;
++ reg = <0x0 0x200 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "FRDDR_B";
+ interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
+@@ -1569,7 +1569,7 @@
+ frddr_c: audio-controller@240 {
+ compatible = "amlogic,g12a-frddr",
+ "amlogic,axg-frddr";
+- reg = <0x0 0x240 0x0 0x1c>;
++ reg = <0x0 0x240 0x0 0x2c>;
+ #sound-dai-cells = <0>;
+ sound-name-prefix = "FRDDR_C";
+ interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
--- /dev/null
+From d5f6fa904ecbadbb8e9fa6302b0fc165bec0559a Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Mon, 9 Sep 2019 19:01:22 +0400
+Subject: arm64: dts: meson-gxl-s905x-khadas-vim: fix gpio-keys-polled node
+
+From: Christian Hewitt <christianshewitt@gmail.com>
+
+commit d5f6fa904ecbadbb8e9fa6302b0fc165bec0559a upstream.
+
+Fix DTC warnings:
+
+arch/arm/dts/meson-gxl-s905x-khadas-vim.dtb: Warning (avoid_unnecessary_addr_size):
+ /gpio-keys-polled: unnecessary #address-cells/#size-cells
+ without "ranges" or child "reg" property
+
+Fixes: e15d2774b8c0 ("ARM64: dts: meson-gxl: add support for the Khadas VIM board")
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+Reviewed-by: Kevin Hilman <khilman@baylibre.com>
+Signed-off-by: Kevin Hilman <khilman@baylibre.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+@@ -33,11 +33,9 @@
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+- #address-cells = <1>;
+- #size-cells = <0>;
+ poll-interval = <100>;
+
+- button@0 {
++ power-button {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
--- /dev/null
+From a636f93fcdb4a516e7cba6a365645ee8429602b2 Mon Sep 17 00:00:00 2001
+From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
+Date: Thu, 3 Oct 2019 12:14:49 +0530
+Subject: arm64: dts: qcom: msm8998: Disable coresight by default
+
+From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
+
+commit a636f93fcdb4a516e7cba6a365645ee8429602b2 upstream.
+
+Boot failure has been reported on MSM8998 based laptop when
+coresight is enabled. This is most likely due to lack of
+firmware support for coresight on production device when
+compared to debug device like MTP where this issue is not
+observed. So disable coresight by default for MSM8998 and
+enable it only for MSM8998 MTP.
+
+Reported-and-tested-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
+Fixes: 783abfa2249a ("arm64: dts: qcom: msm8998: Add Coresight support")
+Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 68 ++++++++++++++++++++++++++++++
+ arch/arm64/boot/dts/qcom/msm8998.dtsi | 51 +++++++++++++++-------
+ 2 files changed, 102 insertions(+), 17 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
+@@ -27,6 +27,66 @@
+ status = "okay";
+ };
+
++&etf {
++ status = "okay";
++};
++
++&etm1 {
++ status = "okay";
++};
++
++&etm2 {
++ status = "okay";
++};
++
++&etm3 {
++ status = "okay";
++};
++
++&etm4 {
++ status = "okay";
++};
++
++&etm5 {
++ status = "okay";
++};
++
++&etm6 {
++ status = "okay";
++};
++
++&etm7 {
++ status = "okay";
++};
++
++&etm8 {
++ status = "okay";
++};
++
++&etr {
++ status = "okay";
++};
++
++&funnel1 {
++ status = "okay";
++};
++
++&funnel2 {
++ status = "okay";
++};
++
++&funnel3 {
++ status = "okay";
++};
++
++&funnel4 {
++ status = "okay";
++};
++
++&funnel5 {
++ status = "okay";
++};
++
+ &pm8005_lsid1 {
+ pm8005-regulators {
+ compatible = "qcom,pm8005-regulators";
+@@ -51,6 +111,10 @@
+ vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
+ };
+
++&replicator1 {
++ status = "okay";
++};
++
+ &rpm_requests {
+ pm8998-regulators {
+ compatible = "qcom,rpm-pm8998-regulators";
+@@ -249,6 +313,10 @@
+ pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
+ };
+
++&stm {
++ status = "okay";
++};
++
+ &ufshc {
+ vcc-supply = <&vreg_l20a_2p95>;
+ vccq-supply = <&vreg_l26a_1p2>;
+--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
+@@ -998,11 +998,12 @@
+ #interrupt-cells = <0x2>;
+ };
+
+- stm@6002000 {
++ stm: stm@6002000 {
+ compatible = "arm,coresight-stm", "arm,primecell";
+ reg = <0x06002000 0x1000>,
+ <0x16280000 0x180000>;
+ reg-names = "stm-base", "stm-data-base";
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1016,9 +1017,10 @@
+ };
+ };
+
+- funnel@6041000 {
++ funnel1: funnel@6041000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x06041000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1045,9 +1047,10 @@
+ };
+ };
+
+- funnel@6042000 {
++ funnel2: funnel@6042000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x06042000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1075,9 +1078,10 @@
+ };
+ };
+
+- funnel@6045000 {
++ funnel3: funnel@6045000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x06045000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1113,9 +1117,10 @@
+ };
+ };
+
+- replicator@6046000 {
++ replicator1: replicator@6046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x06046000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1137,9 +1142,10 @@
+ };
+ };
+
+- etf@6047000 {
++ etf: etf@6047000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x06047000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1163,9 +1169,10 @@
+ };
+ };
+
+- etr@6048000 {
++ etr: etr@6048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x06048000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1181,9 +1188,10 @@
+ };
+ };
+
+- etm@7840000 {
++ etm1: etm@7840000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07840000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1200,9 +1208,10 @@
+ };
+ };
+
+- etm@7940000 {
++ etm2: etm@7940000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07940000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1219,9 +1228,10 @@
+ };
+ };
+
+- etm@7a40000 {
++ etm3: etm@7a40000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07a40000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1238,9 +1248,10 @@
+ };
+ };
+
+- etm@7b40000 {
++ etm4: etm@7b40000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07b40000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1257,9 +1268,10 @@
+ };
+ };
+
+- funnel@7b60000 { /* APSS Funnel */
++ funnel4: funnel@7b60000 { /* APSS Funnel */
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07b60000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1343,9 +1355,10 @@
+ };
+ };
+
+- funnel@7b70000 {
++ funnel5: funnel@7b70000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x07b70000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1369,9 +1382,10 @@
+ };
+ };
+
+- etm@7c40000 {
++ etm5: etm@7c40000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07c40000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1385,9 +1399,10 @@
+ };
+ };
+
+- etm@7d40000 {
++ etm6: etm@7d40000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07d40000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1401,9 +1416,10 @@
+ };
+ };
+
+- etm@7e40000 {
++ etm7: etm@7e40000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07e40000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
+@@ -1417,9 +1433,10 @@
+ };
+ };
+
+- etm@7f40000 {
++ etm8: etm@7f40000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x07f40000 0x1000>;
++ status = "disabled";
+
+ clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "atclk";
--- /dev/null
+From 43b0a4b482478aa4fe7240230be74a79dee95679 Mon Sep 17 00:00:00 2001
+From: Rob Clark <robdclark@chromium.org>
+Date: Fri, 25 Oct 2019 14:21:06 -0700
+Subject: arm64: dts: qcom: sdm845-cheza: delete zap-shader
+
+From: Rob Clark <robdclark@chromium.org>
+
+commit 43b0a4b482478aa4fe7240230be74a79dee95679 upstream.
+
+This is unused on cheza. Delete the node to get ride of the reserved-
+memory section, and to avoid the driver from attempting to load a zap
+shader that doesn't exist every time it powers up the GPU.
+
+This also avoids a massive amount of dmesg spam about missing zap fw:
+ msm ae00000.mdss: [drm:adreno_request_fw] *ERROR* failed to load
+qcom/a630_zap.mdt: -2
+ adreno 5000000.gpu: [drm:adreno_zap_shader_load] *ERROR* Unable to
+load a630_zap.mdt
+
+Signed-off-by: Rob Clark <robdclark@chromium.org>
+Cc: Douglas Anderson <dianders@chromium.org>
+Fixes: 3fdeaee951aa ("arm64: dts: sdm845: Add zap shader region for GPU")
+Reviewed-by: Douglas Anderson <dianders@chromium.org>
+Tested-by: Douglas Anderson <dianders@chromium.org>
+Signed-off-by: Andy Gross <agross@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 2 ++
+ arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
+@@ -165,6 +165,8 @@
+ /delete-node/ &venus_mem;
+ /delete-node/ &cdsp_mem;
+ /delete-node/ &cdsp_pas;
++/delete-node/ &zap_shader;
++/delete-node/ &gpu_mem;
+
+ /* Increase the size from 120 MB to 128 MB */
+ &mpss_region {
+--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
+@@ -2824,7 +2824,7 @@
+
+ qcom,gmu = <&gmu>;
+
+- zap-shader {
++ zap_shader: zap-shader {
+ memory-region = <&gpu_mem>;
+ };
+
--- /dev/null
+From a381325812691f57aece60aaee76938ac8fc6619 Mon Sep 17 00:00:00 2001
+From: Biju Das <biju.das@bp.renesas.com>
+Date: Fri, 4 Oct 2019 15:52:40 +0100
+Subject: arm64: dts: renesas: r8a774a1: Remove audio port node
+
+From: Biju Das <biju.das@bp.renesas.com>
+
+commit a381325812691f57aece60aaee76938ac8fc6619 upstream.
+
+This patch removes audio port node from SoC device tree and
+fixes the below dtb warning
+
+ Warning (unit_address_vs_reg): /soc/sound@ec500000/ports/port@0: node has a unit name, but no reg property
+
+Fixes: e2f04248fcd4 ("arm64: dts: renesas: r8a774a1: Add audio support")
+Signed-off-by: Biju Das <biju.das@bp.renesas.com>
+Link: https://lore.kernel.org/r/1570200761-884-1-git-send-email-biju.das@bp.renesas.com
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/renesas/hihope-common.dtsi | 22 ++++++++++------------
+ arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 11 -----------
+ 2 files changed, 10 insertions(+), 23 deletions(-)
+
+--- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi
++++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
+@@ -86,7 +86,7 @@
+
+ label = "rcar-sound";
+
+- dais = <&rsnd_port0>;
++ dais = <&rsnd_port>;
+ };
+
+ vbus0_usb2: regulator-vbus0-usb2 {
+@@ -191,7 +191,7 @@
+ port@2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+- remote-endpoint = <&rsnd_endpoint0>;
++ remote-endpoint = <&rsnd_endpoint>;
+ };
+ };
+ };
+@@ -327,17 +327,15 @@
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+- ports {
+- rsnd_port0: port@0 {
+- rsnd_endpoint0: endpoint {
+- remote-endpoint = <&dw_hdmi0_snd_in>;
+-
+- dai-format = "i2s";
+- bitclock-master = <&rsnd_endpoint0>;
+- frame-master = <&rsnd_endpoint0>;
++ rsnd_port: port {
++ rsnd_endpoint: endpoint {
++ remote-endpoint = <&dw_hdmi0_snd_in>;
++
++ dai-format = "i2s";
++ bitclock-master = <&rsnd_endpoint>;
++ frame-master = <&rsnd_endpoint>;
+
+- playback = <&ssi2>;
+- };
++ playback = <&ssi2>;
+ };
+ };
+ };
+--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+@@ -1726,17 +1726,6 @@
+ "ssi.1", "ssi.0";
+ status = "disabled";
+
+- ports {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- port@0 {
+- reg = <0>;
+- };
+- port@1 {
+- reg = <1>;
+- };
+- };
+-
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
--- /dev/null
+From 28a1b34c00dad4be91108369ca25ef8dc8bf850d Mon Sep 17 00:00:00 2001
+From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Date: Thu, 12 Sep 2019 11:31:43 +0100
+Subject: arm64: dts: renesas: r8a77970: Fix PWM3
+
+From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+
+commit 28a1b34c00dad4be91108369ca25ef8dc8bf850d upstream.
+
+The pwm3 was incorrectly added with a compatible reference to the
+renesas,pwm-r8a7790 (H2) due to a single characther ommision.
+
+Fix the compatible string.
+
+Fixes: de625477c632 ("arm64: dts: renesas: r8a779{7|8}0: add PWM support")
+Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Link: https://lore.kernel.org/r/20190912103143.985-1-kieran.bingham+renesas@ideasonboard.com
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+@@ -652,7 +652,7 @@
+ };
+
+ pwm3: pwm@e6e33000 {
+- compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
++ compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
--- /dev/null
+From 24953de0a5e31dcca7e82c8a3c79abc2dfe8fb6e Mon Sep 17 00:00:00 2001
+From: Johannes Berg <johannes.berg@intel.com>
+Date: Mon, 13 Jan 2020 12:53:59 +0100
+Subject: cfg80211: check for set_wiphy_params
+
+From: Johannes Berg <johannes.berg@intel.com>
+
+commit 24953de0a5e31dcca7e82c8a3c79abc2dfe8fb6e upstream.
+
+Check if set_wiphy_params is assigned and return an error if not,
+some drivers (e.g. virt_wifi where syzbot reported it) don't have
+it.
+
+Reported-by: syzbot+e8a797964a4180eb57d5@syzkaller.appspotmail.com
+Reported-by: syzbot+34b582cf32c1db008f8e@syzkaller.appspotmail.com
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+Link: https://lore.kernel.org/r/20200113125358.ac07f276efff.Ibd85ee1b12e47b9efb00a2adc5cd3fac50da791a@changeid
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ net/wireless/rdev-ops.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/net/wireless/rdev-ops.h
++++ b/net/wireless/rdev-ops.h
+@@ -538,6 +538,10 @@ static inline int
+ rdev_set_wiphy_params(struct cfg80211_registered_device *rdev, u32 changed)
+ {
+ int ret;
++
++ if (!rdev->ops->set_wiphy_params)
++ return -EOPNOTSUPP;
++
+ trace_rdev_set_wiphy_params(&rdev->wiphy, changed);
+ ret = rdev->ops->set_wiphy_params(&rdev->wiphy, changed);
+ trace_rdev_return_int(&rdev->wiphy, ret);
--- /dev/null
+From 4a50d454502f1401171ff061a5424583f91266db Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Tue, 1 Oct 2019 14:45:01 +0300
+Subject: cw1200: Fix a signedness bug in cw1200_load_firmware()
+
+From: Dan Carpenter <dan.carpenter@oracle.com>
+
+commit 4a50d454502f1401171ff061a5424583f91266db upstream.
+
+The "priv->hw_type" is an enum and in this context GCC will treat it
+as an unsigned int so the error handling will never trigger.
+
+Fixes: a910e4a94f69 ("cw1200: add driver for the ST-E CW1100 & CW1200 WLAN chipsets")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/st/cw1200/fwio.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/wireless/st/cw1200/fwio.c
++++ b/drivers/net/wireless/st/cw1200/fwio.c
+@@ -320,12 +320,12 @@ int cw1200_load_firmware(struct cw1200_c
+ goto out;
+ }
+
+- priv->hw_type = cw1200_get_hw_type(val32, &major_revision);
+- if (priv->hw_type < 0) {
++ ret = cw1200_get_hw_type(val32, &major_revision);
++ if (ret < 0) {
+ pr_err("Can't deduce hardware type.\n");
+- ret = -ENOTSUPP;
+ goto out;
+ }
++ priv->hw_type = ret;
+
+ /* Set DPLL Reg value, and read back to confirm writes work */
+ ret = cw1200_reg_write_32(priv, ST90TDS_TSET_GEN_R_W_REG_ID,
--- /dev/null
+From dbce0b65046d1735d7054c54ec2387dba84ba258 Mon Sep 17 00:00:00 2001
+From: Rob Herring <robh@kernel.org>
+Date: Tue, 17 Dec 2019 10:27:12 -0600
+Subject: dt-bindings: Add missing 'properties' keyword enclosing 'snps,tso'
+
+From: Rob Herring <robh@kernel.org>
+
+commit dbce0b65046d1735d7054c54ec2387dba84ba258 upstream.
+
+DT property definitions must be under a 'properties' keyword. This was
+missing for 'snps,tso' in an if/then clause. A meta-schema fix will
+catch future errors like this.
+
+Fixes: 7db3545aef5f ("dt-bindings: net: stmmac: Convert the binding to a schemas")
+Cc: "David S. Miller" <davem@davemloft.net>
+Acked-by: Maxime Ripard <mripard@kernel.org>
+Signed-off-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
++++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+@@ -347,6 +347,7 @@ allOf:
+ - st,spear600-gmac
+
+ then:
++ properties:
+ snps,tso:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
--- /dev/null
+From 0149385537e6d36f535fcd83cfcabf83a32f0836 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
+Date: Wed, 2 Oct 2019 16:44:52 +0200
+Subject: irqchip: Place CONFIG_SIFIVE_PLIC into the menu
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+
+commit 0149385537e6d36f535fcd83cfcabf83a32f0836 upstream.
+
+Somehow CONFIG_SIFIVE_PLIC ended up outside of the "IRQ chip support"
+menu.
+
+Fixes: 8237f8bc4f6e ("irqchip: add a SiFive PLIC driver")
+Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
+Acked-by: Palmer Dabbelt <palmer@sifive.com>
+Link: https://lore.kernel.org/r/20191002144452.10178-1-j.neuschaefer@gmx.net
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -483,8 +483,6 @@ config TI_SCI_INTA_IRQCHIP
+ If you wish to use interrupt aggregator irq resources managed by the
+ TI System Controller, say Y here. Otherwise, say N.
+
+-endmenu
+-
+ config SIFIVE_PLIC
+ bool "SiFive Platform-Level Interrupt Controller"
+ depends on RISCV
+@@ -496,3 +494,5 @@ config SIFIVE_PLIC
+ interrupt sources are subordinate to the PLIC.
+
+ If you don't know what to do here, say Y.
++
++endmenu
--- /dev/null
+From c15995695ea971253ea9507f6732c8cd35384e01 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 31 Oct 2019 23:39:39 +0300
+Subject: mtd: cfi_cmdset_0002: fix delayed error detection on HyperFlash
+
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+
+commit c15995695ea971253ea9507f6732c8cd35384e01 upstream.
+
+The commit 4844ef80305d ("mtd: cfi_cmdset_0002: Add support for polling
+status register") added checking for the status register error bits into
+chip_good() to only return 1 if these bits are 0s. Unfortunately, this
+means that polling using chip_good() always reaches a timeout condition
+when erase or program failure bits are set. Let's fully delegate the task
+of determining the error conditions to cfi_check_err_status() and make
+chip_good() only look for the Device Ready/Busy condition.
+
+Fixes: 4844ef80305d ("mtd: cfi_cmdset_0002: Add support for polling status register")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/chips/cfi_cmdset_0002.c | 58 ++++++++++++++++++++----------------
+ 1 file changed, 33 insertions(+), 25 deletions(-)
+
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -123,14 +123,14 @@ static int cfi_use_status_reg(struct cfi
+ (extp->SoftwareFeatures & poll_mask) == CFI_POLL_STATUS_REG;
+ }
+
+-static void cfi_check_err_status(struct map_info *map, struct flchip *chip,
+- unsigned long adr)
++static int cfi_check_err_status(struct map_info *map, struct flchip *chip,
++ unsigned long adr)
+ {
+ struct cfi_private *cfi = map->fldrv_priv;
+ map_word status;
+
+ if (!cfi_use_status_reg(cfi))
+- return;
++ return 0;
+
+ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, chip->start, map, cfi,
+ cfi->device_type, NULL);
+@@ -138,7 +138,7 @@ static void cfi_check_err_status(struct
+
+ /* The error bits are invalid while the chip's busy */
+ if (!map_word_bitsset(map, status, CMD(CFI_SR_DRB)))
+- return;
++ return 0;
+
+ if (map_word_bitsset(map, status, CMD(0x3a))) {
+ unsigned long chipstatus = MERGESTATUS(status);
+@@ -155,7 +155,12 @@ static void cfi_check_err_status(struct
+ if (chipstatus & CFI_SR_SLSB)
+ pr_err("%s sector write protected, status %lx\n",
+ map->name, chipstatus);
++
++ /* Erase/Program status bits are set on the operation failure */
++ if (chipstatus & (CFI_SR_ESB | CFI_SR_PSB))
++ return 1;
+ }
++ return 0;
+ }
+
+ /* #define DEBUG_CFI_FEATURES */
+@@ -852,20 +857,16 @@ static int __xipram chip_good(struct map
+
+ if (cfi_use_status_reg(cfi)) {
+ map_word ready = CMD(CFI_SR_DRB);
+- map_word err = CMD(CFI_SR_PSB | CFI_SR_ESB);
++
+ /*
+ * For chips that support status register, check device
+- * ready bit and Erase/Program status bit to know if
+- * operation succeeded.
++ * ready bit
+ */
+ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, chip->start, map, cfi,
+ cfi->device_type, NULL);
+ curd = map_read(map, addr);
+
+- if (map_word_andequal(map, curd, ready, ready))
+- return !map_word_bitsset(map, curd, err);
+-
+- return 0;
++ return map_word_andequal(map, curd, ready, ready);
+ }
+
+ oldd = map_read(map, addr);
+@@ -1703,8 +1704,11 @@ static int __xipram do_write_oneword_onc
+ break;
+ }
+
+- if (chip_good(map, chip, adr, datum))
++ if (chip_good(map, chip, adr, datum)) {
++ if (cfi_check_err_status(map, chip, adr))
++ ret = -EIO;
+ break;
++ }
+
+ /* Latency issues. Drop the lock, wait a while and retry */
+ UDELAY(map, chip, adr, 1);
+@@ -1777,7 +1781,6 @@ static int __xipram do_write_oneword_ret
+ ret = do_write_oneword_once(map, chip, adr, datum, mode, cfi);
+ if (ret) {
+ /* reset on all failures. */
+- cfi_check_err_status(map, chip, adr);
+ map_write(map, CMD(0xF0), chip->start);
+ /* FIXME - should have reset delay before continuing */
+
+@@ -1974,12 +1977,17 @@ static int __xipram do_write_buffer_wait
+ */
+ if (time_after(jiffies, timeo) &&
+ !chip_good(map, chip, adr, datum)) {
++ pr_err("MTD %s(): software timeout, address:0x%.8lx.\n",
++ __func__, adr);
+ ret = -EIO;
+ break;
+ }
+
+- if (chip_good(map, chip, adr, datum))
++ if (chip_good(map, chip, adr, datum)) {
++ if (cfi_check_err_status(map, chip, adr))
++ ret = -EIO;
+ break;
++ }
+
+ /* Latency issues. Drop the lock, wait a while and retry */
+ UDELAY(map, chip, adr, 1);
+@@ -2075,12 +2083,8 @@ static int __xipram do_write_buffer(stru
+ chip->word_write_time);
+
+ ret = do_write_buffer_wait(map, chip, adr, datum);
+- if (ret) {
+- cfi_check_err_status(map, chip, adr);
++ if (ret)
+ do_write_buffer_reset(map, chip, cfi);
+- pr_err("MTD %s(): software timeout, address:0x%.8lx.\n",
+- __func__, adr);
+- }
+
+ xip_enable(map, chip, adr);
+
+@@ -2275,9 +2279,9 @@ retry:
+ udelay(1);
+ }
+
+- if (!chip_good(map, chip, adr, datum)) {
++ if (!chip_good(map, chip, adr, datum) ||
++ cfi_check_err_status(map, chip, adr)) {
+ /* reset on all failures. */
+- cfi_check_err_status(map, chip, adr);
+ map_write(map, CMD(0xF0), chip->start);
+ /* FIXME - should have reset delay before continuing */
+
+@@ -2471,8 +2475,11 @@ static int __xipram do_erase_chip(struct
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_good(map, chip, adr, map_word_ff(map)))
++ if (chip_good(map, chip, adr, map_word_ff(map))) {
++ if (cfi_check_err_status(map, chip, adr))
++ ret = -EIO;
+ break;
++ }
+
+ if (time_after(jiffies, timeo)) {
+ printk(KERN_WARNING "MTD %s(): software timeout\n",
+@@ -2487,7 +2494,6 @@ static int __xipram do_erase_chip(struct
+ /* Did we succeed? */
+ if (ret) {
+ /* reset on all failures. */
+- cfi_check_err_status(map, chip, adr);
+ map_write(map, CMD(0xF0), chip->start);
+ /* FIXME - should have reset delay before continuing */
+
+@@ -2568,8 +2574,11 @@ static int __xipram do_erase_oneblock(st
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_good(map, chip, adr, map_word_ff(map)))
++ if (chip_good(map, chip, adr, map_word_ff(map))) {
++ if (cfi_check_err_status(map, chip, adr))
++ ret = -EIO;
+ break;
++ }
+
+ if (time_after(jiffies, timeo)) {
+ printk(KERN_WARNING "MTD %s(): software timeout\n",
+@@ -2584,7 +2593,6 @@ static int __xipram do_erase_oneblock(st
+ /* Did we succeed? */
+ if (ret) {
+ /* reset on all failures. */
+- cfi_check_err_status(map, chip, adr);
+ map_write(map, CMD(0xF0), chip->start);
+ /* FIXME - should have reset delay before continuing */
+
--- /dev/null
+From 72914a8cff7e1d910c58e125e15a0da409e3135f Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 31 Oct 2019 23:37:27 +0300
+Subject: mtd: cfi_cmdset_0002: only check errors when ready in cfi_check_err_status()
+
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+
+commit 72914a8cff7e1d910c58e125e15a0da409e3135f upstream.
+
+Cypress S26K{L|S}P{128|256|512}S datasheet says that the error bits in
+the status register are only valid when the "device ready" bit 7 is set.
+Add the check for the device ready bit in cfi_check_err_status() as that
+function isn't always called with this bit set.
+
+Fixes: 4844ef80305d ("mtd: cfi_cmdset_0002: Add support for polling status register")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/chips/cfi_cmdset_0002.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -136,6 +136,10 @@ static void cfi_check_err_status(struct
+ cfi->device_type, NULL);
+ status = map_read(map, adr);
+
++ /* The error bits are invalid while the chip's busy */
++ if (!map_word_bitsset(map, status, CMD(CFI_SR_DRB)))
++ return;
++
+ if (map_word_bitsset(map, status, CMD(0x3a))) {
+ unsigned long chipstatus = MERGESTATUS(status);
+
--- /dev/null
+From 14f89e088155314d311e4d4dd9f2b4ccaeef92b2 Mon Sep 17 00:00:00 2001
+From: Angelo Dureghello <angelo.dureghello@timesys.com>
+Date: Wed, 30 Oct 2019 12:39:57 +0100
+Subject: mtd: devices: fix mchp23k256 read and write
+
+From: Angelo Dureghello <angelo.dureghello@timesys.com>
+
+commit 14f89e088155314d311e4d4dd9f2b4ccaeef92b2 upstream.
+
+Due to the use of sizeof(), command size set for the spi transfer
+was wrong. Driver was sending and receiving always 1 byte less
+and especially on write, it was hanging.
+
+echo -n -e "\\x1\\x2\\x3\\x4" > /dev/mtd1
+
+And read part too now works as expected.
+
+hexdump -C -n16 /dev/mtd1
+00000000 01 02 03 04 ab f3 ad c2 ab e3 f4 36 dd 38 04 15
+00000010
+
+Fixes: 4379075a870b ("mtd: mchp23k256: Add support for mchp23lcv1024")
+Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mtd/devices/mchp23k256.c | 20 ++++++++++++--------
+ 1 file changed, 12 insertions(+), 8 deletions(-)
+
+--- a/drivers/mtd/devices/mchp23k256.c
++++ b/drivers/mtd/devices/mchp23k256.c
+@@ -64,15 +64,17 @@ static int mchp23k256_write(struct mtd_i
+ struct spi_transfer transfer[2] = {};
+ struct spi_message message;
+ unsigned char command[MAX_CMD_SIZE];
+- int ret;
++ int ret, cmd_len;
+
+ spi_message_init(&message);
+
++ cmd_len = mchp23k256_cmdsz(flash);
++
+ command[0] = MCHP23K256_CMD_WRITE;
+ mchp23k256_addr2cmd(flash, to, command);
+
+ transfer[0].tx_buf = command;
+- transfer[0].len = mchp23k256_cmdsz(flash);
++ transfer[0].len = cmd_len;
+ spi_message_add_tail(&transfer[0], &message);
+
+ transfer[1].tx_buf = buf;
+@@ -88,8 +90,8 @@ static int mchp23k256_write(struct mtd_i
+ if (ret)
+ return ret;
+
+- if (retlen && message.actual_length > sizeof(command))
+- *retlen += message.actual_length - sizeof(command);
++ if (retlen && message.actual_length > cmd_len)
++ *retlen += message.actual_length - cmd_len;
+
+ return 0;
+ }
+@@ -101,16 +103,18 @@ static int mchp23k256_read(struct mtd_in
+ struct spi_transfer transfer[2] = {};
+ struct spi_message message;
+ unsigned char command[MAX_CMD_SIZE];
+- int ret;
++ int ret, cmd_len;
+
+ spi_message_init(&message);
+
++ cmd_len = mchp23k256_cmdsz(flash);
++
+ memset(&transfer, 0, sizeof(transfer));
+ command[0] = MCHP23K256_CMD_READ;
+ mchp23k256_addr2cmd(flash, from, command);
+
+ transfer[0].tx_buf = command;
+- transfer[0].len = mchp23k256_cmdsz(flash);
++ transfer[0].len = cmd_len;
+ spi_message_add_tail(&transfer[0], &message);
+
+ transfer[1].rx_buf = buf;
+@@ -126,8 +130,8 @@ static int mchp23k256_read(struct mtd_in
+ if (ret)
+ return ret;
+
+- if (retlen && message.actual_length > sizeof(command))
+- *retlen += message.actual_length - sizeof(command);
++ if (retlen && message.actual_length > cmd_len)
++ *retlen += message.actual_length - cmd_len;
+
+ return 0;
+ }
--- /dev/null
+From 54fb3fe0f211d4729a2551cf9497bd612189af9d Mon Sep 17 00:00:00 2001
+From: Sudeep Holla <sudeep.holla@arm.com>
+Date: Thu, 28 Nov 2019 15:33:57 +0000
+Subject: Revert "arm64: dts: juno: add dma-ranges property"
+
+From: Sudeep Holla <sudeep.holla@arm.com>
+
+commit 54fb3fe0f211d4729a2551cf9497bd612189af9d upstream.
+
+This reverts commit 193d00a2b35ee3353813b4006a18131122087205.
+
+Commit 951d48855d86 ("of: Make of_dma_get_range() work on bus nodes")
+reworked the logic such that of_dma_get_range() works correctly
+starting from a bus node containing "dma-ranges".
+
+Since on Juno we don't have a SoC level bus node and "dma-ranges" is
+present only in the root node, we get the following error:
+
+OF: translation of DMA address(0) to CPU address failed node(/sram@2e000000)
+OF: translation of DMA address(0) to CPU address failed node(/uart@7ff80000)
+...
+OF: translation of DMA address(0) to CPU address failed node(/mhu@2b1f0000)
+OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
+OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
+OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
+
+So let's fix it by dropping the "dma-ranges" property for now. This
+should be fine since it doesn't represent any kind of device-visible
+restriction; it was only there for completeness, and we've since given
+in to the assumption that missing "dma-ranges" implies a 1:1 mapping
+anyway.
+
+We can add it later with a proper SoC bus node and moving all the
+devices that belong there along with the "dma-ranges" if required.
+
+Fixes: 193d00a2b35e ("arm64: dts: juno: add dma-ranges property")
+Cc: Rob Herring <robh+dt@kernel.org>
+Cc: Liviu Dudau <liviu.dudau@arm.com>
+Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Acked-by: Robin Murphy <robin.murphy@arm.com>
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/boot/dts/arm/juno-base.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
++++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
+@@ -6,7 +6,6 @@
+ /*
+ * Devices shared by all Juno boards
+ */
+- dma-ranges = <0 0 0 0 0x100 0>;
+
+ memtimer: timer@2a810000 {
+ compatible = "arm,armv7-timer-mem";
net-stmmac-selftests-update-status-when-disabling-rss.patch
net-stmmac-tc-do-not-setup-flower-filtering-if-rss-is-enabled.patch
devlink-wait-longer-before-warning-about-unset-port-type.patch
+xen-blkfront-adjust-indentation-in-xlvbd_alloc_gendisk.patch
+dt-bindings-add-missing-properties-keyword-enclosing-snps-tso.patch
+tcp-refine-rule-to-allow-epollout-generation-under-mem-pressure.patch
+irqchip-place-config_sifive_plic-into-the-menu.patch
+arm64-dts-qcom-msm8998-disable-coresight-by-default.patch
+cw1200-fix-a-signedness-bug-in-cw1200_load_firmware.patch
+arm64-dts-meson-axg-fix-audio-fifo-reg-size.patch
+arm64-dts-meson-g12-fix-audio-fifo-reg-size.patch
+arm64-dts-meson-gxl-s905x-khadas-vim-fix-gpio-keys-polled-node.patch
+arm64-dts-renesas-r8a77970-fix-pwm3.patch
+arm64-dts-marvell-add-ap806-dual-missing-cpu-clocks.patch
+cfg80211-check-for-set_wiphy_params.patch
+tick-sched-annotate-lockless-access-to-last_jiffies_update.patch
+arm64-dts-marvell-fix-cp110-nand-controller-node-multi-line-comment-alignment.patch
+arm64-dts-renesas-r8a774a1-remove-audio-port-node.patch
+arm64-dts-imx8mm-evk-assigned-clocks-for-audio-plls.patch
+arm64-dts-qcom-sdm845-cheza-delete-zap-shader.patch
+arm-dts-imx6ul-kontron-n6310-s-disable-the-snvs-poweroff-driver.patch
+arm64-dts-allwinner-a64-re-add-pmu-node.patch
+arm-dts-dra7-fix-cpsw-mdio-fck-clock.patch
+arm64-dts-juno-fix-uart-frequency.patch
+arm-dts-fix-sgx-sysconfig-register-for-omap4.patch
+revert-arm64-dts-juno-add-dma-ranges-property.patch
+mtd-devices-fix-mchp23k256-read-and-write.patch
+mtd-cfi_cmdset_0002-only-check-errors-when-ready-in-cfi_check_err_status.patch
+mtd-cfi_cmdset_0002-fix-delayed-error-detection-on-hyperflash.patch
+um-don-t-trace-irqflags-during-shutdown.patch
+um-virtio_uml-disallow-modular-build.patch
--- /dev/null
+From 216808c6ba6d00169fd2aa928ec3c0e63bef254f Mon Sep 17 00:00:00 2001
+From: Eric Dumazet <edumazet@google.com>
+Date: Thu, 12 Dec 2019 12:55:31 -0800
+Subject: tcp: refine rule to allow EPOLLOUT generation under mem pressure
+
+From: Eric Dumazet <edumazet@google.com>
+
+commit 216808c6ba6d00169fd2aa928ec3c0e63bef254f upstream.
+
+At the time commit ce5ec440994b ("tcp: ensure epoll edge trigger
+wakeup when write queue is empty") was added to the kernel,
+we still had a single write queue, combining rtx and write queues.
+
+Once we moved the rtx queue into a separate rb-tree, testing
+if sk_write_queue is empty has been suboptimal.
+
+Indeed, if we have packets in the rtx queue, we probably want
+to delay the EPOLLOUT generation at the time incoming packets
+will free them, making room, but more importantly avoiding
+flooding application with EPOLLOUT events.
+
+Solution is to use tcp_rtx_and_write_queues_empty() helper.
+
+Fixes: 75c119afe14f ("tcp: implement rb-tree based retransmit queue")
+Signed-off-by: Eric Dumazet <edumazet@google.com>
+Cc: Jason Baron <jbaron@akamai.com>
+Cc: Neal Cardwell <ncardwell@google.com>
+Acked-by: Soheil Hassas Yeganeh <soheil@google.com>
+Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ net/ipv4/tcp.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+--- a/net/ipv4/tcp.c
++++ b/net/ipv4/tcp.c
+@@ -1087,8 +1087,7 @@ do_error:
+ goto out;
+ out_err:
+ /* make sure we wake any epoll edge trigger waiter */
+- if (unlikely(skb_queue_len(&sk->sk_write_queue) == 0 &&
+- err == -EAGAIN)) {
++ if (unlikely(tcp_rtx_and_write_queues_empty(sk) && err == -EAGAIN)) {
+ sk->sk_write_space(sk);
+ tcp_chrono_stop(sk, TCP_CHRONO_SNDBUF_LIMITED);
+ }
+@@ -1419,8 +1418,7 @@ out_err:
+ sock_zerocopy_put_abort(uarg, true);
+ err = sk_stream_error(sk, flags, err);
+ /* make sure we wake any epoll edge trigger waiter */
+- if (unlikely(skb_queue_len(&sk->sk_write_queue) == 0 &&
+- err == -EAGAIN)) {
++ if (unlikely(tcp_rtx_and_write_queues_empty(sk) && err == -EAGAIN)) {
+ sk->sk_write_space(sk);
+ tcp_chrono_stop(sk, TCP_CHRONO_SNDBUF_LIMITED);
+ }
--- /dev/null
+From de95a991bb72e009f47e0c4bbc90fc5f594588d5 Mon Sep 17 00:00:00 2001
+From: Eric Dumazet <edumazet@google.com>
+Date: Wed, 4 Dec 2019 20:56:19 -0800
+Subject: tick/sched: Annotate lockless access to last_jiffies_update
+
+From: Eric Dumazet <edumazet@google.com>
+
+commit de95a991bb72e009f47e0c4bbc90fc5f594588d5 upstream.
+
+syzbot (KCSAN) reported a data-race in tick_do_update_jiffies64():
+
+BUG: KCSAN: data-race in tick_do_update_jiffies64 / tick_do_update_jiffies64
+
+write to 0xffffffff8603d008 of 8 bytes by interrupt on cpu 1:
+ tick_do_update_jiffies64+0x100/0x250 kernel/time/tick-sched.c:73
+ tick_sched_do_timer+0xd4/0xe0 kernel/time/tick-sched.c:138
+ tick_sched_timer+0x43/0xe0 kernel/time/tick-sched.c:1292
+ __run_hrtimer kernel/time/hrtimer.c:1514 [inline]
+ __hrtimer_run_queues+0x274/0x5f0 kernel/time/hrtimer.c:1576
+ hrtimer_interrupt+0x22a/0x480 kernel/time/hrtimer.c:1638
+ local_apic_timer_interrupt arch/x86/kernel/apic/apic.c:1110 [inline]
+ smp_apic_timer_interrupt+0xdc/0x280 arch/x86/kernel/apic/apic.c:1135
+ apic_timer_interrupt+0xf/0x20 arch/x86/entry/entry_64.S:830
+ arch_local_irq_restore arch/x86/include/asm/paravirt.h:756 [inline]
+ kcsan_setup_watchpoint+0x1d4/0x460 kernel/kcsan/core.c:436
+ check_access kernel/kcsan/core.c:466 [inline]
+ __tsan_read1 kernel/kcsan/core.c:593 [inline]
+ __tsan_read1+0xc2/0x100 kernel/kcsan/core.c:593
+ kallsyms_expand_symbol.constprop.0+0x70/0x160 kernel/kallsyms.c:79
+ kallsyms_lookup_name+0x7f/0x120 kernel/kallsyms.c:170
+ insert_report_filterlist kernel/kcsan/debugfs.c:155 [inline]
+ debugfs_write+0x14b/0x2d0 kernel/kcsan/debugfs.c:256
+ full_proxy_write+0xbd/0x100 fs/debugfs/file.c:225
+ __vfs_write+0x67/0xc0 fs/read_write.c:494
+ vfs_write fs/read_write.c:558 [inline]
+ vfs_write+0x18a/0x390 fs/read_write.c:542
+ ksys_write+0xd5/0x1b0 fs/read_write.c:611
+ __do_sys_write fs/read_write.c:623 [inline]
+ __se_sys_write fs/read_write.c:620 [inline]
+ __x64_sys_write+0x4c/0x60 fs/read_write.c:620
+ do_syscall_64+0xcc/0x370 arch/x86/entry/common.c:290
+ entry_SYSCALL_64_after_hwframe+0x44/0xa9
+
+read to 0xffffffff8603d008 of 8 bytes by task 0 on cpu 0:
+ tick_do_update_jiffies64+0x2b/0x250 kernel/time/tick-sched.c:62
+ tick_nohz_update_jiffies kernel/time/tick-sched.c:505 [inline]
+ tick_nohz_irq_enter kernel/time/tick-sched.c:1257 [inline]
+ tick_irq_enter+0x139/0x1c0 kernel/time/tick-sched.c:1274
+ irq_enter+0x4f/0x60 kernel/softirq.c:354
+ entering_irq arch/x86/include/asm/apic.h:517 [inline]
+ entering_ack_irq arch/x86/include/asm/apic.h:523 [inline]
+ smp_apic_timer_interrupt+0x55/0x280 arch/x86/kernel/apic/apic.c:1133
+ apic_timer_interrupt+0xf/0x20 arch/x86/entry/entry_64.S:830
+ native_safe_halt+0xe/0x10 arch/x86/include/asm/irqflags.h:60
+ arch_cpu_idle+0xa/0x10 arch/x86/kernel/process.c:571
+ default_idle_call+0x1e/0x40 kernel/sched/idle.c:94
+ cpuidle_idle_call kernel/sched/idle.c:154 [inline]
+ do_idle+0x1af/0x280 kernel/sched/idle.c:263
+ cpu_startup_entry+0x1b/0x20 kernel/sched/idle.c:355
+ rest_init+0xec/0xf6 init/main.c:452
+ arch_call_rest_init+0x17/0x37
+ start_kernel+0x838/0x85e init/main.c:786
+ x86_64_start_reservations+0x29/0x2b arch/x86/kernel/head64.c:490
+ x86_64_start_kernel+0x72/0x76 arch/x86/kernel/head64.c:471
+ secondary_startup_64+0xa4/0xb0 arch/x86/kernel/head_64.S:241
+
+Reported by Kernel Concurrency Sanitizer on:
+CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.0-rc7+ #0
+Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
+
+Use READ_ONCE() and WRITE_ONCE() to annotate this expected race.
+
+Reported-by: syzbot <syzkaller@googlegroups.com>
+Signed-off-by: Eric Dumazet <edumazet@google.com>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Link: https://lore.kernel.org/r/20191205045619.204946-1-edumazet@google.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ kernel/time/tick-sched.c | 14 +++++++++-----
+ 1 file changed, 9 insertions(+), 5 deletions(-)
+
+--- a/kernel/time/tick-sched.c
++++ b/kernel/time/tick-sched.c
+@@ -58,8 +58,9 @@ static void tick_do_update_jiffies64(kti
+
+ /*
+ * Do a quick check without holding jiffies_lock:
++ * The READ_ONCE() pairs with two updates done later in this function.
+ */
+- delta = ktime_sub(now, last_jiffies_update);
++ delta = ktime_sub(now, READ_ONCE(last_jiffies_update));
+ if (delta < tick_period)
+ return;
+
+@@ -70,8 +71,9 @@ static void tick_do_update_jiffies64(kti
+ if (delta >= tick_period) {
+
+ delta = ktime_sub(delta, tick_period);
+- last_jiffies_update = ktime_add(last_jiffies_update,
+- tick_period);
++ /* Pairs with the lockless read in this function. */
++ WRITE_ONCE(last_jiffies_update,
++ ktime_add(last_jiffies_update, tick_period));
+
+ /* Slow path for long timeouts */
+ if (unlikely(delta >= tick_period)) {
+@@ -79,8 +81,10 @@ static void tick_do_update_jiffies64(kti
+
+ ticks = ktime_divns(delta, incr);
+
+- last_jiffies_update = ktime_add_ns(last_jiffies_update,
+- incr * ticks);
++ /* Pairs with the lockless read in this function. */
++ WRITE_ONCE(last_jiffies_update,
++ ktime_add_ns(last_jiffies_update,
++ incr * ticks));
+ }
+ do_timer(++ticks);
+
--- /dev/null
+From 5c1f33e2a03c0b8710b5d910a46f1e1fb0607679 Mon Sep 17 00:00:00 2001
+From: Johannes Berg <johannes.berg@intel.com>
+Date: Tue, 17 Sep 2019 13:20:14 +0200
+Subject: um: Don't trace irqflags during shutdown
+
+From: Johannes Berg <johannes.berg@intel.com>
+
+commit 5c1f33e2a03c0b8710b5d910a46f1e1fb0607679 upstream.
+
+In the main() code, we eventually enable signals just before
+exec() or exit(), in order to to not have signals pending and
+delivered *after* the exec().
+
+I've observed SIGSEGV loops at this point, and the reason seems
+to be the irqflags tracing; this makes sense as the kernel is
+no longer really functional at this point. Since there's really
+no reason to use unblock_signals_trace() here (I had just done
+a global search & replace), use the plain unblock_signals() in
+this case to avoid going into the no longer functional kernel.
+
+Fixes: 0dafcbe128d2 ("um: Implement TRACE_IRQFLAGS_SUPPORT")
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+Signed-off-by: Richard Weinberger <richard@nod.at>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/um/os-Linux/main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/um/os-Linux/main.c
++++ b/arch/um/os-Linux/main.c
+@@ -170,7 +170,7 @@ int __init main(int argc, char **argv, c
+ * that they won't be delivered after the exec, when
+ * they are definitely not expected.
+ */
+- unblock_signals_trace();
++ unblock_signals();
+
+ os_info("\n");
+ /* Reboot */
--- /dev/null
+From bf9f80cf0ccab5f346f7d3cdc445da8fcfe6ce34 Mon Sep 17 00:00:00 2001
+From: Johannes Berg <johannes.berg@intel.com>
+Date: Tue, 8 Oct 2019 17:43:21 +0200
+Subject: um: virtio_uml: Disallow modular build
+
+From: Johannes Berg <johannes.berg@intel.com>
+
+commit bf9f80cf0ccab5f346f7d3cdc445da8fcfe6ce34 upstream.
+
+This driver *can* be a module, but then its parameters (socket path)
+are untrusted data from inside the VM, and that isn't allowed. Allow
+the code to only be built-in to avoid that.
+
+Fixes: 5d38f324993f ("um: drivers: Add virtio vhost-user driver")
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+Acked-by: Anton Ivanov <anton.ivanov@cambridgegreys.co.uk>
+Signed-off-by: Richard Weinberger <richard@nod.at>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/um/drivers/Kconfig | 2 +-
+ arch/um/drivers/virtio_uml.c | 4 ++--
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/um/drivers/Kconfig
++++ b/arch/um/drivers/Kconfig
+@@ -337,7 +337,7 @@ config UML_NET_SLIRP
+ endmenu
+
+ config VIRTIO_UML
+- tristate "UML driver for virtio devices"
++ bool "UML driver for virtio devices"
+ select VIRTIO
+ help
+ This driver provides support for virtio based paravirtual device
+--- a/arch/um/drivers/virtio_uml.c
++++ b/arch/um/drivers/virtio_uml.c
+@@ -4,12 +4,12 @@
+ *
+ * Copyright(c) 2019 Intel Corporation
+ *
+- * This module allows virtio devices to be used over a vhost-user socket.
++ * This driver allows virtio devices to be used over a vhost-user socket.
+ *
+ * Guest devices can be instantiated by kernel module or command line
+ * parameters. One device will be created for each parameter. Syntax:
+ *
+- * [virtio_uml.]device=<socket>:<virtio_id>[:<platform_id>]
++ * virtio_uml.device=<socket>:<virtio_id>[:<platform_id>]
+ * where:
+ * <socket> := vhost-user socket path to connect
+ * <virtio_id> := virtio device id (as in virtio_ids.h)
--- /dev/null
+From 589b72894f53124a39d1bb3c0cecaf9dcabac417 Mon Sep 17 00:00:00 2001
+From: Nathan Chancellor <natechancellor@gmail.com>
+Date: Mon, 9 Dec 2019 13:14:44 -0700
+Subject: xen/blkfront: Adjust indentation in xlvbd_alloc_gendisk
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Nathan Chancellor <natechancellor@gmail.com>
+
+commit 589b72894f53124a39d1bb3c0cecaf9dcabac417 upstream.
+
+Clang warns:
+
+../drivers/block/xen-blkfront.c:1117:4: warning: misleading indentation;
+statement is not part of the previous 'if' [-Wmisleading-indentation]
+ nr_parts = PARTS_PER_DISK;
+ ^
+../drivers/block/xen-blkfront.c:1115:3: note: previous statement is here
+ if (err)
+ ^
+
+This is because there is a space at the beginning of this line; remove
+it so that the indentation is consistent according to the Linux kernel
+coding style and clang no longer warns.
+
+While we are here, the previous line has some trailing whitespace; clean
+that up as well.
+
+Fixes: c80a420995e7 ("xen-blkfront: handle Xen major numbers other than XENVBD")
+Link: https://github.com/ClangBuiltLinux/linux/issues/791
+Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
+Reviewed-by: Juergen Gross <jgross@suse.com>
+Acked-by: Roger Pau Monné <roger.pau@citrix.com>
+Signed-off-by: Juergen Gross <jgross@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/block/xen-blkfront.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/block/xen-blkfront.c
++++ b/drivers/block/xen-blkfront.c
+@@ -1113,8 +1113,8 @@ static int xlvbd_alloc_gendisk(blkif_sec
+ if (!VDEV_IS_EXTENDED(info->vdevice)) {
+ err = xen_translate_vdev(info->vdevice, &minor, &offset);
+ if (err)
+- return err;
+- nr_parts = PARTS_PER_DISK;
++ return err;
++ nr_parts = PARTS_PER_DISK;
+ } else {
+ minor = BLKIF_MINOR_EXT(info->vdevice);
+ nr_parts = PARTS_PER_EXT_DISK;
projects / thirdparty / kernel / stable-queue.git / commitdiff
