3.2-stable patches

added patches:
	drm-i915-fix-eld-writing-for-sandybridge.patch
	drm-i915-gen7-disable-the-rhwo-optimization-as-it-can-cause-gpu-hangs.patch
	drm-i915-gen7-work-around-a-system-hang-on-ivb.patch

diff --git a/queue-3.2/drm-i915-fix-eld-writing-for-sandybridge.patch b/queue-3.2/drm-i915-fix-eld-writing-for-sandybridge.patch
new file mode 100644 (file)
index 0000000..0961196
--- /dev/null
+++ b/queue-3.2/drm-i915-fix-eld-writing-for-sandybridge.patch
@@ -0,0 +1,42 @@
+From b3f33cbf7ace8fc149993ee35e0d0fd57f41d6d8 Mon Sep 17 00:00:00 2001
+From: Wu Fengguang <fengguang.wu@intel.com>
+Date: Fri, 9 Dec 2011 20:42:17 +0800
+Subject: drm/i915: fix ELD writing for SandyBridge
+
+From: Wu Fengguang <fengguang.wu@intel.com>
+
+commit b3f33cbf7ace8fc149993ee35e0d0fd57f41d6d8 upstream.
+
+SandyBridge should be using the same register addresses as IvyBridge.
+
+Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
+Signed-off-by: Keith Packard <keithp@keithp.com>
+Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c |   10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -5876,14 +5876,14 @@ static void ironlake_write_eld(struct dr
+       int aud_cntl_st;
+       int aud_cntrl_st2;
+ 
+-      if (IS_IVYBRIDGE(connector->dev)) {
+-              hdmiw_hdmiedid = GEN7_HDMIW_HDMIEDID_A;
+-              aud_cntl_st = GEN7_AUD_CNTRL_ST_A;
+-              aud_cntrl_st2 = GEN7_AUD_CNTRL_ST2;
+-      } else {
++      if (HAS_PCH_IBX(connector->dev)) {
+               hdmiw_hdmiedid = GEN5_HDMIW_HDMIEDID_A;
+               aud_cntl_st = GEN5_AUD_CNTL_ST_A;
+               aud_cntrl_st2 = GEN5_AUD_CNTL_ST2;
++      } else {
++              hdmiw_hdmiedid = GEN7_HDMIW_HDMIEDID_A;
++              aud_cntl_st = GEN7_AUD_CNTRL_ST_A;
++              aud_cntrl_st2 = GEN7_AUD_CNTRL_ST2;
+       }
+ 
+       i = to_intel_crtc(crtc)->pipe;

diff --git a/queue-3.2/drm-i915-gen7-disable-the-rhwo-optimization-as-it-can-cause-gpu-hangs.patch b/queue-3.2/drm-i915-gen7-disable-the-rhwo-optimization-as-it-can-cause-gpu-hangs.patch
new file mode 100644 (file)
index 0000000..d185dde
--- /dev/null
+++ b/queue-3.2/drm-i915-gen7-disable-the-rhwo-optimization-as-it-can-cause-gpu-hangs.patch
@@ -0,0 +1,49 @@
+From d71de14ddf423ccc9a2e3f7e37553c99ead20d7c Mon Sep 17 00:00:00 2001
+From: Kenneth Graunke <kenneth@whitecape.org>
+Date: Wed, 8 Feb 2012 12:53:52 -0800
+Subject: drm/i915: gen7: Disable the RHWO optimization as it can cause GPU hangs.
+
+From: Kenneth Graunke <kenneth@whitecape.org>
+
+commit d71de14ddf423ccc9a2e3f7e37553c99ead20d7c upstream.
+
+The BSpec Workarounds page states that bits 10 and 26 must be set to
+avoid 3D ring hangs.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610
+Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
+Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
+Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h      |    3 +++
+ drivers/gpu/drm/i915/intel_display.c |    4 ++++
+ 2 files changed, 7 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -2887,6 +2887,9 @@
+ #define  DISP_FBC_WM_DIS              (1<<15)
+ 
+ /* GEN7 chicken */
++#define GEN7_COMMON_SLICE_CHICKEN1            0x7010
++# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC    ((1<<10) | (1<<26))
++
+ #define GEN7_L3CNTLREG1                               0xB01C
+ #define  GEN7_WA_FOR_GEN7_L3_CONTROL                  0x3C4FFF8C
+ 
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8255,6 +8255,10 @@ static void ivybridge_init_clock_gating(
+ 
+       I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
+ 
++      /* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
++      I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
++                 GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
++
+       /* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
+       I915_WRITE(GEN7_L3CNTLREG1,
+                       GEN7_WA_FOR_GEN7_L3_CONTROL);

diff --git a/queue-3.2/drm-i915-gen7-work-around-a-system-hang-on-ivb.patch b/queue-3.2/drm-i915-gen7-work-around-a-system-hang-on-ivb.patch
new file mode 100644 (file)
index 0000000..dd8f3f2
--- /dev/null
+++ b/queue-3.2/drm-i915-gen7-work-around-a-system-hang-on-ivb.patch
@@ -0,0 +1,52 @@
+From db099c8f963fe656108e0a068274c5580a17f69b Mon Sep 17 00:00:00 2001
+From: Eugeni Dodonov <eugeni.dodonov@intel.com>
+Date: Wed, 8 Feb 2012 12:53:51 -0800
+Subject: drm/i915: gen7: work around a system hang on IVB
+
+From: Eugeni Dodonov <eugeni.dodonov@intel.com>
+
+commit db099c8f963fe656108e0a068274c5580a17f69b upstream.
+
+This adds the workaround for WaCatErrorRejectionIssue which could result
+in a system hang.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610
+Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
+Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
+Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
+Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h      |    4 ++++
+ drivers/gpu/drm/i915/intel_display.c |    5 +++++
+ 2 files changed, 9 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -2893,6 +2893,10 @@
+ #define GEN7_L3_CHICKEN_MODE_REGISTER         0xB030
+ #define  GEN7_WA_L3_CHICKEN_MODE                              0x20000000
+ 
++/* WaCatErrorRejectionIssue */
++#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG                0x9030
++#define  GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB     (1<<11)
++
+ /* PCH */
+ 
+ /* south display engine interrupt */
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8261,6 +8261,11 @@ static void ivybridge_init_clock_gating(
+       I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
+                       GEN7_WA_L3_CHICKEN_MODE);
+ 
++      /* This is required by WaCatErrorRejectionIssue */
++      I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
++                      I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
++                      GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
++
+       for_each_pipe(pipe) {
+               I915_WRITE(DSPCNTR(pipe),
+                          I915_READ(DSPCNTR(pipe)) |

diff --git a/queue-3.2/series b/queue-3.2/series
index e01ae1caf60513c1a3a68efc7d0207461544c796..1fd5565a0acdc10a71b825fc57bac14be5139b54 100644 (file)
--- a/queue-3.2/series
+++ b/queue-3.2/series
@@ -51,3 +51,6 @@ acpi-pm-do-not-save-restore-nvs-on-asus-k54c-k54hr.patch
 rtl8192cu-add-new-device-ids.patch
 drm-i915-gen7-implement-rczunit-workaround.patch
 drm-i915-gen7-implement-an-l3-caching-workaround.patch
+drm-i915-gen7-work-around-a-system-hang-on-ivb.patch
+drm-i915-gen7-disable-the-rhwo-optimization-as-it-can-cause-gpu-hangs.patch
+drm-i915-fix-eld-writing-for-sandybridge.patch