i2c: piix4, x86/platform: Move the SB800 PIIX4 FCH definitions to <asm/amd/fch.h>

SB800_PIIX4_FCH_PM_ADDR is used to indicate the base address for the
FCH PM registers.  Multiple drivers may need this base address, so
move related defines to a common header location and rename them
accordingly.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Cc: Jean Delvare <jdelvare@suse.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Sanket Goswami <Sanket.Goswami@amd.com>
Cc: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: linux-i2c@vger.kernel.org
Link: https://lore.kernel.org/r/20250422234830.2840784-4-superm1@kernel.org

diff --git a/arch/x86/include/asm/amd/fch.h b/arch/x86/include/asm/amd/fch.h
new file mode 100644 (file)
index 0000000..28972bd
--- /dev/null
+++ b/arch/x86/include/asm/amd/fch.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_AMD_FCH_H_
+#define _ASM_X86_AMD_FCH_H_
+
+#define FCH_PM_BASE                    0xFED80300
+
+/* Register offsets from PM base: */
+#define FCH_PM_DECODEEN                        0x00
+#define FCH_PM_DECODEEN_SMBUS0SEL      GENMASK(20, 19)
+
+#endif /* _ASM_X86_AMD_FCH_H_ */

diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index dd75916157f0519a17fb3d45432d7cf1373bd22a..59ecaa990bce3a1de2520dd80a411d995ba16a10 100644 (file)
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -34,6 +34,7 @@
 #include <linux/dmi.h>
 #include <linux/acpi.h>
 #include <linux/io.h>
+#include <asm/amd/fch.h>
 
 #include "i2c-piix4.h"
 
@@ -80,12 +81,11 @@
 #define SB800_PIIX4_PORT_IDX_MASK      0x06
 #define SB800_PIIX4_PORT_IDX_SHIFT     1
 
-/* On kerncz and Hudson2, SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */
-#define SB800_PIIX4_PORT_IDX_KERNCZ            0x02
-#define SB800_PIIX4_PORT_IDX_MASK_KERNCZ       0x18
+/* SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */
+#define SB800_PIIX4_PORT_IDX_KERNCZ            (FCH_PM_DECODEEN + 0x02)
+#define SB800_PIIX4_PORT_IDX_MASK_KERNCZ       (FCH_PM_DECODEEN_SMBUS0SEL >> 16)
 #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ      3
 
-#define SB800_PIIX4_FCH_PM_ADDR                        0xFED80300
 #define SB800_PIIX4_FCH_PM_SIZE                        8
 #define SB800_ASF_ACPI_PATH                    "\\_SB.ASFC"
 
@@ -162,19 +162,19 @@ int piix4_sb800_region_request(struct device *dev, struct sb800_mmio_cfg *mmio_c
        if (mmio_cfg->use_mmio) {
                void __iomem *addr;
 
-               if (!request_mem_region_muxed(SB800_PIIX4_FCH_PM_ADDR,
+               if (!request_mem_region_muxed(FCH_PM_BASE,
                                              SB800_PIIX4_FCH_PM_SIZE,
                                              "sb800_piix4_smb")) {
                        dev_err(dev,
                                "SMBus base address memory region 0x%x already in use.\n",
-                               SB800_PIIX4_FCH_PM_ADDR);
+                               FCH_PM_BASE);
                        return -EBUSY;
                }
 
-               addr = ioremap(SB800_PIIX4_FCH_PM_ADDR,
+               addr = ioremap(FCH_PM_BASE,
                               SB800_PIIX4_FCH_PM_SIZE);
                if (!addr) {
-                       release_mem_region(SB800_PIIX4_FCH_PM_ADDR,
+                       release_mem_region(FCH_PM_BASE,
                                           SB800_PIIX4_FCH_PM_SIZE);
                        dev_err(dev, "SMBus base address mapping failed.\n");
                        return -ENOMEM;
@@ -201,7 +201,7 @@ void piix4_sb800_region_release(struct device *dev, struct sb800_mmio_cfg *mmio_
 {
        if (mmio_cfg->use_mmio) {
                iounmap(mmio_cfg->addr);
-               release_mem_region(SB800_PIIX4_FCH_PM_ADDR,
+               release_mem_region(FCH_PM_BASE,
                                   SB800_PIIX4_FCH_PM_SIZE);
                return;
        }