--- /dev/null
+From 25fbbaf515acd13399589bd5ee6de5f35740cef2 Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Sun, 31 Aug 2025 01:08:56 +0800
+Subject: clk: sunxi-ng: mp: Fix dual-divider clock rate readback
+
+From: Chen-Yu Tsai <wens@csie.org>
+
+commit 25fbbaf515acd13399589bd5ee6de5f35740cef2 upstream.
+
+When dual-divider clock support was introduced, the P divider offset was
+left out of the .recalc_rate readback function. This causes the clock
+rate to become bogus or even zero (possibly due to the P divider being
+1, leading to a divide-by-zero).
+
+Fix this by incorporating the P divider offset into the calculation.
+
+Fixes: 45717804b75e ("clk: sunxi-ng: mp: introduce dual-divider clock")
+Reviewed-by: Andre Przywara <andre.przywara@arm.com>
+Link: https://patch.msgid.link/20250830170901.1996227-4-wens@kernel.org
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/clk/sunxi-ng/ccu_mp.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/sunxi-ng/ccu_mp.c b/drivers/clk/sunxi-ng/ccu_mp.c
+index 354c981943b6..4221b1888b38 100644
+--- a/drivers/clk/sunxi-ng/ccu_mp.c
++++ b/drivers/clk/sunxi-ng/ccu_mp.c
+@@ -185,7 +185,7 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw,
+ p &= (1 << cmp->p.width) - 1;
+
+ if (cmp->common.features & CCU_FEATURE_DUAL_DIV)
+- rate = (parent_rate / p) / m;
++ rate = (parent_rate / (p + cmp->p.offset)) / m;
+ else
+ rate = (parent_rate >> p) / m;
+
+--
+2.51.0
+