]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915/display: configure SDP split for DP-MST
authorVinod Govindapillai <vinod.govindapillai@intel.com>
Tue, 22 Aug 2023 20:48:18 +0000 (23:48 +0300)
committerJani Nikula <jani.nikula@intel.com>
Fri, 25 Aug 2023 06:08:24 +0000 (09:08 +0300)
Extend the SDP split audio config for DP-MST

Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230822204818.109742-3-vinod.govindapillai@intel.com
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dp.h
drivers/gpu/drm/i915/display/intel_dp_mst.c

index 6ec5f2dbb6db922c4d20c43fa5aec0addcde460a..05694e0b61430fb4d905dba2e1edb86ba0308474 100644 (file)
@@ -2625,7 +2625,7 @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
        return ret;
 }
 
-static void
+void
 intel_dp_audio_compute_config(struct intel_encoder *encoder,
                              struct intel_crtc_state *pipe_config,
                              struct drm_connector_state *conn_state)
index 788a577ebe16e2d6e0890166261b0867e30f7f46..b34ddc9c352a42839bc0595f171e2db3550b839b 100644 (file)
@@ -65,6 +65,9 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
                                struct link_config_limits *limits,
                                int timeslots,
                                bool recompute_pipe_bpp);
+void intel_dp_audio_compute_config(struct intel_encoder *encoder,
+                                  struct intel_crtc_state *pipe_config,
+                                  struct drm_connector_state *conn_state);
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
index 3eb085fbc7c825b2c7699342b562806be33f4ef5..2d1c42a5e6846c243167cae5accdf72a55db89b6 100644 (file)
@@ -293,19 +293,6 @@ static int intel_dp_mst_update_slots(struct intel_encoder *encoder,
        return 0;
 }
 
-static bool intel_dp_mst_has_audio(const struct drm_connector_state *conn_state)
-{
-       const struct intel_digital_connector_state *intel_conn_state =
-               to_intel_digital_connector_state(conn_state);
-       struct intel_connector *connector =
-               to_intel_connector(conn_state->connector);
-
-       if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
-               return connector->base.display_info.has_audio;
-       else
-               return intel_conn_state->force_audio == HDMI_AUDIO_ON;
-}
-
 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
                                       struct intel_crtc_state *pipe_config,
                                       struct drm_connector_state *conn_state)
@@ -325,10 +312,6 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
        pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
        pipe_config->has_pch_encoder = false;
 
-       pipe_config->has_audio =
-               intel_dp_mst_has_audio(conn_state) &&
-               intel_audio_compute_config(encoder, pipe_config, conn_state);
-
        /*
         * for MST we always configure max link bw - the spec doesn't
         * seem to suggest we should do otherwise.
@@ -396,6 +379,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
                pipe_config->lane_lat_optim_mask =
                        bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 
+       intel_dp_audio_compute_config(encoder, pipe_config, conn_state);
+
        intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 
        return 0;
@@ -800,6 +785,8 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
                intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
                             FECSTALL_DIS_DPTSTREAM_DPTTG);
 
+       intel_audio_sdp_split_update(pipe_config);
+
        intel_enable_transcoder(pipe_config);
 
        intel_crtc_vblank_on(pipe_config);