Add microarchtecture tunable for pass_align_tight_loops [PR117438]

Hi Hongtao:
   Add m_CASCADELAK, and m_SKYLAKE_AVX512.
   Place X86_TUNE_ALIGN_TIGHT_LOOPS in the appropriate section.

   Bootstrapped X86_64.
   Ok for trunk?
BR
Mayshao
gcc/ChangeLog:

	PR target/117438
	* config/i386/i386-features.cc (TARGET_ALIGN_TIGHT_LOOPS):
	default true in all processors except for m_ZHAOXIN, m_CASCADELAKE, and
	m_SKYLAKE_AVX512.
	* config/i386/i386.h (TARGET_ALIGN_TIGHT_LOOPS): New Macro.
	* config/i386/x86-tune.def (X86_TUNE_ALIGN_TIGHT_LOOPS):
	New tune

diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index e2e85212a4fd8745ca50de7b394052562d2cf5b5..1fc29cae5d39a93ae7e3c066165f3a1dce100643 100644 (file)
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -3620,7 +3620,9 @@ public:
   /* opt_pass methods: */
   bool gate (function *) final override
     {
-      return optimize && optimize_function_for_speed_p (cfun);
+      return TARGET_ALIGN_TIGHT_LOOPS
+            && optimize
+            && optimize_function_for_speed_p (cfun);
     }
 
   unsigned int execute (function *) final override

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index ad3cb6e135ffa525cffc8944c65909bbf49d56c7..65227e7fd4132d31478ffae04194e7e2489304a2 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -466,6 +466,9 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST];
 #define TARGET_USE_RCR ix86_tune_features[X86_TUNE_USE_RCR]
 #define TARGET_SSE_MOVCC_USE_BLENDV \
        ix86_tune_features[X86_TUNE_SSE_MOVCC_USE_BLENDV]
+#define TARGET_ALIGN_TIGHT_LOOPS \
+        ix86_tune_features[X86_TUNE_ALIGN_TIGHT_LOOPS]
+
 
 /* Feature tests against the various architecture variations.  */
 enum ix86_arch_indices {

diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 81dd895ac819eaaf9d375ee1c144ee8199279ceb..dc7d6f19a3b92fdb5434f75f573b382e069580c5 100644 (file)
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -214,7 +214,7 @@ DEF_TUNE (X86_TUNE_SINGLE_POP, "single_pop", m_386 | m_486 | m_PENT
 DEF_TUNE (X86_TUNE_DOUBLE_POP, "double_pop", m_PENT | m_LAKEMONT)
 
 /*****************************************************************************/
-/* Branch predictor tuning                                                  */
+/* Branch predictor tuning and Front-end tuning                                                     */
 /*****************************************************************************/
 
 /* X86_TUNE_PAD_SHORT_FUNCTION: Make every function to be at least 4
@@ -235,6 +235,10 @@ DEF_TUNE (X86_TUNE_FOUR_JUMP_LIMIT, "four_jump_limit",
          m_PPRO | m_P4_NOCONA | m_BONNELL | m_SILVERMONT | m_GOLDMONT
          | m_GOLDMONT_PLUS | m_INTEL | m_ATHLON_K8 | m_AMDFAM10)
 
+/* X86_TUNE_ALIGN_TIGHT_LOOPS: if false, tight loops are not aligned. */
+DEF_TUNE (X86_TUNE_ALIGN_TIGHT_LOOPS, "align_tight_loops",
+        ~(m_ZHAOXIN | m_CASCADELAKE | m_SKYLAKE_AVX512))
+
 /*****************************************************************************/
 /* Integer instruction selection tuning                                      */
 /*****************************************************************************/