]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/rcar-du: dsi: Fix PHY lock bit check
authorTomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Tue, 17 Dec 2024 05:31:35 +0000 (07:31 +0200)
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Tue, 17 Dec 2024 13:12:35 +0000 (15:12 +0200)
The driver checks for bit 16 (using CLOCKSET1_LOCK define) in CLOCKSET1
register when waiting for the PPI clock. However, the right bit to check
is bit 17 (CLOCKSET1_LOCK_PHY define). Not only that, but there's
nothing in the documents for bit 16 for V3U nor V4H.

So, fix the check to use bit 17, and drop the define for bit 16.

Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver")
Fixes: 11696c5e8924 ("drm: Place Renesas drivers in a separate dir")
Cc: stable@vger.kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241217-rcar-gh-dsi-v5-1-e77421093c05@ideasonboard.com
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c
drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

index 8180625d5866d1035d792290d9fcd9aeaaa86702..be4ffc0ab14feeb88f06343e3ce018fec0c102fd 100644 (file)
@@ -587,7 +587,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi,
        for (timeout = 10; timeout > 0; --timeout) {
                if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) &&
                    (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) &&
-                   (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK))
+                   (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK_PHY))
                        break;
 
                usleep_range(1000, 2000);
index f8114d11f2d158e56845c7fc09e83c896b417725..a6b276f1d6ee15901e133080fe5bbb5e0376283d 100644 (file)
 
 #define CLOCKSET1                      0x101c
 #define CLOCKSET1_LOCK_PHY             (1 << 17)
-#define CLOCKSET1_LOCK                 (1 << 16)
 #define CLOCKSET1_CLKSEL               (1 << 8)
 #define CLOCKSET1_CLKINSEL_EXTAL       (0 << 2)
 #define CLOCKSET1_CLKINSEL_DIG         (1 << 2)