*/
void arm_emulate_firmware_reset(CPUState *cpustate, int target_el);
-#ifdef TARGET_AARCH64
int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
#endif
}
-#else
-static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { }
-static inline void aarch64_sve_change_el(CPUARMState *env, int o,
- int n, bool a)
-{ }
-#endif
-
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);
*/
new_len = sve_vqm1_for_el(env, cur_el);
if (new_len < old_len) {
+#ifdef TARGET_AARCH64
aarch64_sve_narrow_vq(env, new_len + 1);
+#endif
}
}
* Note that new_el can never be 0. If cur_el is 0, then
* el0_a64 is is_a64(), else el0_a64 is ignored.
*/
+#ifdef TARGET_AARCH64
aarch64_sve_change_el(env, cur_el, new_el, is_a64(env));
+#endif
}
if (cur_el < new_el) {
/* When changing vector length, clear inaccessible state. */
if (new_len < old_len) {
+#ifdef TARGET_AARCH64
aarch64_sve_narrow_vq(env, new_len + 1);
+#endif
}
}
#endif