]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/mips: Restrict ITU to TCG
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Wed, 25 Jun 2025 21:59:49 +0000 (23:59 +0200)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 14 Jul 2025 22:24:26 +0000 (00:24 +0200)
MIPS Inter-Thread Communication Unit is implemented using
TCG. Check for TCG both in Kconfig and CPS source.

Fixes: 2321d971b6f ("hw/mips: Add dependency MIPS_CPS -> MIPS_ITU")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250702164953.18579-1-philmd@linaro.org>

hw/mips/Kconfig
hw/mips/cps.c
hw/misc/Kconfig

index b09c89a01759491273953aa2f1efcc799e31a813..f84fffcd3238d5a042e2e28e69f8d75a155dbd9b 100644 (file)
@@ -76,7 +76,7 @@ config LOONGSON3V
 
 config MIPS_CPS
     bool
-    select MIPS_ITU
+    select MIPS_ITU if TCG
 
 config MIPS_BOSTON
     bool
index 2a3ba3f58d28bf23dd94d65b916d7133cb305254..e47695e2b0a6cca5bf8d7bb3216436350f14c492 100644 (file)
@@ -24,7 +24,7 @@
 #include "hw/mips/mips.h"
 #include "hw/qdev-clock.h"
 #include "hw/qdev-properties.h"
-#include "system/kvm.h"
+#include "system/tcg.h"
 #include "system/reset.h"
 
 qemu_irq get_cps_irq(MIPSCPSState *s, int pin_number)
@@ -59,7 +59,7 @@ static bool cpu_mips_itu_supported(CPUMIPSState *env)
 {
     bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || ase_mt_available(env);
 
-    return is_mt && !kvm_enabled();
+    return is_mt && tcg_enabled();
 }
 
 static void mips_cps_realize(DeviceState *dev, Error **errp)
index c27285b47ab1110d8cdd463224a3cd8531877147..4e35657468b87394ec679fafd0ca5e2395a1196c 100644 (file)
@@ -119,6 +119,7 @@ config STM32L4X5_RCC
 
 config MIPS_ITU
     bool
+    depends on TCG
 
 config MPS2_FPGAIO
     bool