rockchip: rk35xx: Sort soc u-boot.dtsi alphabetically

Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes
is sorted by reg addr then by alphabetical order.

This has no intended change beside sorting existing nodes and removing
a duplicated usbdpphy0_grf node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 05367216e118ad74d1f6cb6eff1b8eae0efeadb5..8ac10f1698f633d9be923527c35ee06b4babf480 100644 (file)
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -38,74 +38,90 @@
        };
 };
 
-&xin24m {
-       bootph-all;
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+       simple-bin-spi {
+               mkimage {
+                       args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+                       offset = <0x8000>;
+               };
+       };
 };
+#endif
 
 &cru {
        bootph-all;
 };
 
-&pmucru {
+&emmc_bus8 {
        bootph-all;
 };
 
-&grf {
+&emmc_clk {
        bootph-all;
 };
 
-&pmugrf {
+&emmc_cmd {
        bootph-all;
 };
 
-&pinctrl {
+&emmc_datastrobe {
        bootph-all;
 };
 
-&pcfg_pull_none_smt {
+&emmc_rstnout {
        bootph-all;
 };
 
-&pcfg_pull_none {
+&fspi_pins {
        bootph-all;
 };
 
-&pcfg_pull_up_drv_level_2 {
+&grf {
        bootph-all;
 };
 
-&pcfg_pull_up {
+&i2c0_xfer {
        bootph-all;
 };
 
-&emmc_bus8 {
+&pcfg_pull_none {
        bootph-all;
 };
 
-&emmc_clk {
+&pcfg_pull_none_smt {
        bootph-all;
 };
 
-&emmc_cmd {
+&pcfg_pull_up {
        bootph-all;
 };
 
-&emmc_datastrobe {
+&pcfg_pull_up_drv_level_2 {
        bootph-all;
 };
 
-&emmc_rstnout {
+&pinctrl {
        bootph-all;
 };
 
-&fspi_pins {
+&pmucru {
        bootph-all;
 };
 
-&i2c0_xfer {
+&pmugrf {
        bootph-all;
 };
 
+&sdhci {
+       bootph-pre-ram;
+       max-frequency = <200000000>;
+};
+
+&sdmmc0 {
+       bootph-pre-ram;
+};
+
 &sdmmc0_bus4 {
        bootph-all;
 };
@@ -126,31 +142,15 @@
        bootph-all;
 };
 
-&uart2m0_xfer {
-       bootph-all;
-};
-
-&sdhci {
-       bootph-pre-ram;
-       max-frequency = <200000000>;
-};
-
-&sdmmc0 {
-       bootph-pre-ram;
-};
-
 &uart2 {
        bootph-pre-ram;
        clock-frequency = <24000000>;
 };
 
-#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
-&binman {
-       simple-bin-spi {
-               mkimage {
-                       args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
-                       offset = <0x8000>;
-               };
-       };
+&uart2m0_xfer {
+       bootph-all;
+};
+
+&xin24m {
+       bootph-all;
 };
-#endif

diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 233eb79d9ba2e1ee09cf41b6bfb9d339f82f741a..7fcbdb9692403c2fd7578db888d3048c388f945e 100644 (file)
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -41,6 +41,17 @@
                status = "disabled";
        };
 
+       vo0_grf: syscon@fd5a6000 {
+               compatible = "rockchip,rk3588-vo-grf", "syscon";
+               reg = <0x0 0xfd5a6000 0x0 0x2000>;
+               clocks = <&cru PCLK_VO0GRF>;
+       };
+
+       usb_grf: syscon@fd5ac000 {
+               compatible = "rockchip,rk3588-usb-grf", "syscon";
+               reg = <0x0 0xfd5ac000 0x0 0x4000>;
+       };
+
        usbdpphy0_grf: syscon@fd5c8000 {
                compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
                reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -72,22 +83,6 @@
                };
        };
 
-       vo0_grf: syscon@fd5a6000 {
-               compatible = "rockchip,rk3588-vo-grf", "syscon";
-               reg = <0x0 0xfd5a6000 0x0 0x2000>;
-               clocks = <&cru PCLK_VO0GRF>;
-       };
-
-       usb_grf: syscon@fd5ac000 {
-               compatible = "rockchip,rk3588-usb-grf", "syscon";
-               reg = <0x0 0xfd5ac000 0x0 0x4000>;
-       };
-
-       usbdpphy0_grf: syscon@fd5c8000 {
-               compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
-               reg = <0x0 0xfd5c8000 0x0 0x4000>;
-       };
-
        rng: rng@fe378000 {
                compatible = "rockchip,trngv1";
                reg = <0x0 0xfe378000 0x0 0x200>;
@@ -125,6 +120,21 @@
        };
 };
 
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+       simple-bin-spi {
+               mkimage {
+                       args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+                       offset = <0x8000>;
+               };
+       };
+};
+#endif
+
+&cru {
+       bootph-pre-ram;
+};
+
 &emmc_bus8 {
        bootph-all;
 };
@@ -145,32 +155,24 @@
        bootph-all;
 };
 
-&pinctrl {
-       bootph-all;
+&ioc {
+       bootph-pre-ram;
 };
 
 &pcfg_pull_none {
        bootph-all;
 };
 
-&pcfg_pull_up_drv_level_2 {
-       bootph-all;
-};
-
 &pcfg_pull_up {
        bootph-all;
 };
 
-&xin24m {
+&pcfg_pull_up_drv_level_2 {
        bootph-all;
 };
 
-&cru {
-       bootph-pre-ram;
-};
-
-&sys_grf {
-       bootph-pre-ram;
+&pinctrl {
+       bootph-all;
 };
 
 &pmu1grf {
@@ -185,13 +187,13 @@
        bootph-pre-ram;
 };
 
-&sdmmc {
+&sdhci {
        bootph-pre-ram;
        bootph-some-ram;
        u-boot,spl-fifo-mode;
 };
 
-&sdhci {
+&sdmmc {
        bootph-pre-ram;
        bootph-some-ram;
        u-boot,spl-fifo-mode;
@@ -213,6 +215,10 @@
        bootph-all;
 };
 
+&sys_grf {
+       bootph-pre-ram;
+};
+
 &uart2 {
        bootph-pre-ram;
        clock-frequency = <24000000>;
@@ -222,17 +228,6 @@
        bootph-all;
 };
 
-&ioc {
-       bootph-pre-ram;
-};
-
-#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
-&binman {
-       simple-bin-spi {
-               mkimage {
-                       args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
-                       offset = <0x8000>;
-               };
-       };
+&xin24m {
+       bootph-all;
 };
-#endif