x86: Fix Haswell CPU string flags (BZ#23709)

Th commit 'Disable TSX on some Haswell processors.' (2702856bf4) changed the
default flags for Haswell models.  Previously, new models were handled by the
default switch path, which assumed a Core i3/i5/i7 if AVX is available. After
the patch, Haswell models (0x3f, 0x3c, 0x45, 0x46) do not set the flags
Fast_Rep_String, Fast_Unaligned_Load, Fast_Unaligned_Copy, and
Prefer_PMINUB_for_stringop (only the TSX one).

This patch fixes it by disentangle the TSX flag handling from the memory
optimization ones.  The strstr case cited on patch now selects the
__strstr_sse2_unaligned as expected for the Haswell cpu.

Checked on x86_64-linux-gnu.

	[BZ #23709]
	* sysdeps/x86/cpu-features.c (init_cpu_features): Set TSX bits
	independently of other flags.

(cherry picked from commit c3d8dc45c9df199b8334599a6cbd98c9950dba62)

diff --git a/ChangeLog b/ChangeLog
index 51a8f488d96661e7e99348af4cfc6c85e481e73a..d558df58afaa7c978d0a2af9429185425efb5e6f 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2018-10-23  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
+
+       [BZ #23709]
+       * sysdeps/x86/cpu-features.c (init_cpu_features): Set TSX bits
+       independently of other flags.
+
 2018-10-30  Florian Weimer  <fweimer@redhat.com>
 
        * stdlib/tst-strtod-overflow.c (do_test): Switch to

diff --git a/NEWS b/NEWS
index 79b028008dc3dab40b7a332e3d8fa77b33a5700a..f3004915f2739c6abff5df38631e451550ac0ee5 100644 (file)
--- a/NEWS
+++ b/NEWS
@@ -19,6 +19,7 @@ The following bugs are resolved with this release:
   [23579] libc: Errors misreported in preadv2
   [23606] Missing ENDBR32 in sysdeps/i386/start.S
   [23679] gethostid: Missing NULL check for gethostbyname_r result
+  [23709] Fix CPU string flags for Haswell-type CPUs
   [23717] Fix stack overflow in stdlib/tst-setcontext9
   [23821] si_band in siginfo_t has wrong type long int on sparc64
   [23822] ia64 static libm.a is missing exp2f, log2f and powf symbols

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index ea0b64fdb962a934c2950d37dfe7ba061aa00ccf..4695ac80d414832783dccf12451c414b83b2e3d1 100644 (file)
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -316,7 +316,13 @@ init_cpu_features (struct cpu_features *cpu_features)
                    | bit_arch_Fast_Unaligned_Copy
                    | bit_arch_Prefer_PMINUB_for_stringop);
              break;
+           }
 
+        /* Disable TSX on some Haswell processors to avoid TSX on kernels that
+           weren't updated with the latest microcode package (which disables
+           broken feature by default).  */
+        switch (model)
+           {
            case 0x3f:
              /* Xeon E7 v3 with stepping >= 4 has working TSX.  */
              if (stepping >= 4)