drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420

Limit downscaling to less than 1.5 (source/destination) in
the horizontal direction and 1.0 in the vertical direction,
When configured for Pipe YUV 420 encoding for port output.

Bspec: 50441, 7490, 69901
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250120172209.188488-6-mitulkumar.ajitkumar.golani@intel.com

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 54f9adba4ac0645a243baa8c960894e8b2c9d7a7..c8bf6fd92ce8da957c0cfa47a2d6e0fcb31f1950 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -459,6 +459,16 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
                calculate_max_scale(crtc, 0, *scaler_id,
                                    &max_hscale, &max_vscale);
 
+               /*
+                * When configured for Pipe YUV 420 encoding for port output,
+                * limit downscaling to less than 1.5 (source/destination) in
+                * the horizontal direction and 1.0 in the vertical direction.
+                */
+               if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+                       max_hscale = 0x18000 - 1;
+                       max_vscale = 0x10000;
+               }
+
                hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst,
                                              0, max_hscale);
                vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst,