ARM: sunxi: dts: Split USB PHY cells into an array

Even though it doesn't make any difference at the binary level, the reg
property is an array of cells, and should be represented as such.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 5cd26ad40a261d0731541b2b397c08555943335f..f8a67b95c13910d016cdb5ad725ec4c9a0fab8d3 100644 (file)
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -502,7 +502,7 @@
                usbphy: phy@1c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun4i-a10-usb-phy";
-                       reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
+                       reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
                        reg-names = "phy_ctrl", "pmu1", "pmu2";
                        clocks = <&ccu CLK_USB_PHY>;
                        clock-names = "usb_phy";

diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 49ba494400e66e284b1b8db59d64a5b23fbae736..7dc67cf771c16c78df39e6b7e9be5c3c05d88ec2 100644 (file)
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -366,7 +366,7 @@
                usbphy: phy@1c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun5i-a13-usb-phy";
-                       reg = <0x01c13400 0x10 0x01c14800 0x4>;
+                       reg = <0x01c13400 0x10>, <0x01c14800 0x4>;
                        reg-names = "phy_ctrl", "pmu1";
                        clocks = <&ccu CLK_USB_PHY0>;
                        clock-names = "usb_phy";

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 767509809d069b846560c9e272adbad6953b4f2e..f087a7ce95aa001056654a12b9f4af6f038b3d97 100644 (file)
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -594,7 +594,7 @@
                usbphy: phy@1c13400 {
                        #phy-cells = <1>;
                        compatible = "allwinner,sun7i-a20-usb-phy";
-                       reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
+                       reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
                        reg-names = "phy_ctrl", "pmu1", "pmu2";
                        clocks = <&ccu CLK_USB_PHY>;
                        clock-names = "usb_phy";