]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/xe: Emit ctx timestamp copy in ring ops
authorMatthew Brost <matthew.brost@intel.com>
Tue, 11 Jun 2024 14:40:45 +0000 (07:40 -0700)
committerMatthew Brost <matthew.brost@intel.com>
Thu, 13 Jun 2024 02:10:20 +0000 (19:10 -0700)
Copy ctx timestamp at beginning of every GPU job to a saved location.
Used to determine how long a job has been running on the hardware.

v2:
 - - s/ctx_timestamp_job/ctx_job_timestamp

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611144053.2805091-4-matthew.brost@intel.com
drivers/gpu/drm/xe/xe_ring_ops.c

index db630d27beba4ae7ce7b0f560125a6f2f078cbda..0be4f489d3e126a236b4d47070da7d19265e835e 100644 (file)
@@ -224,6 +224,19 @@ static u32 get_ppgtt_flag(struct xe_sched_job *job)
        return job->q->vm ? BIT(8) : 0;
 }
 
+static int emit_copy_timestamp(struct xe_lrc *lrc, u32 *dw, int i)
+{
+       dw[i++] = MI_COPY_MEM_MEM | MI_COPY_MEM_MEM_SRC_GGTT |
+               MI_COPY_MEM_MEM_DST_GGTT;
+       dw[i++] = xe_lrc_ctx_job_timestamp_ggtt_addr(lrc);
+       dw[i++] = 0;
+       dw[i++] = xe_lrc_ctx_timestamp_ggtt_addr(lrc);
+       dw[i++] = 0;
+       dw[i++] = MI_NOOP;
+
+       return i;
+}
+
 /* for engines that don't require any special HW handling (no EUs, no aux inval, etc) */
 static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc,
                                    u64 batch_addr, u32 seqno)
@@ -232,6 +245,8 @@ static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc
        u32 ppgtt_flag = get_ppgtt_flag(job);
        struct xe_gt *gt = job->q->gt;
 
+       i = emit_copy_timestamp(lrc, dw, i);
+
        if (job->ring_ops_flush_tlb) {
                dw[i++] = preparser_disable(true);
                i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
@@ -283,6 +298,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
        struct xe_device *xe = gt_to_xe(gt);
        bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
 
+       i = emit_copy_timestamp(lrc, dw, i);
+
        dw[i++] = preparser_disable(true);
 
        /* hsdes: 1809175790 */
@@ -332,6 +349,8 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
        bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
        u32 mask_flags = 0;
 
+       i = emit_copy_timestamp(lrc, dw, i);
+
        dw[i++] = preparser_disable(true);
        if (lacks_render)
                mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
@@ -375,6 +394,8 @@ static void emit_migration_job_gen12(struct xe_sched_job *job,
 {
        u32 dw[MAX_JOB_SIZE_DW], i = 0;
 
+       i = emit_copy_timestamp(lrc, dw, i);
+
        i = emit_store_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
                                seqno, dw, i);