--- /dev/null
+From 482e6ad9adde69d9da08864b4ccf4dfd53edb2f0 Mon Sep 17 00:00:00 2001
+From: Fangzhi Zuo <jerry.zuo@amd.com>
+Date: Wed, 10 May 2023 16:43:30 -0400
+Subject: drm/amd/display: Have Payload Properly Created After Resume
+
+From: Fangzhi Zuo <jerry.zuo@amd.com>
+
+commit 482e6ad9adde69d9da08864b4ccf4dfd53edb2f0 upstream.
+
+At drm suspend sequence, MST dc_sink is removed. When commit cached
+MST stream back in drm resume sequence, the MST stream payload is not
+properly created and added into the payload table. After resume, topology
+change is reprobed by removing existing streams first. That leads to
+no payload is found in the existing payload table as below error
+"[drm] ERROR No payload for [MST PORT:] found in mst state"
+
+1. In encoder .atomic_check routine, remove check existance of dc_sink
+2. Bypass MST by checking existence of MST root port. dc_link_type cannot
+differentiate MST port before topology is rediscovered.
+
+Reviewed-by: Wayne Lin <wayne.lin@amd.com>
+Acked-by: Tom Chung <chiahsuan.chung@amd.com>
+Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
+Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+[Adjusted for variables that were renamed between 6.1 and 6.3.]
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -2763,7 +2763,7 @@ static int dm_resume(void *handle)
+ * this is the case when traversing through already created
+ * MST connectors, should be skipped
+ */
+- if (aconnector->dc_link->type == dc_connection_mst_branch)
++ if (aconnector && aconnector->mst_port)
+ continue;
+
+ mutex_lock(&aconnector->hpd_lock);
+@@ -6492,7 +6492,7 @@ static int dm_encoder_helper_atomic_chec
+ int clock, bpp = 0;
+ bool is_y420 = false;
+
+- if (!aconnector->port || !aconnector->dc_sink)
++ if (!aconnector->port)
+ return 0;
+
+ mst_port = aconnector->port;
--- /dev/null
+From 11c439a19466e7feaccdbce148a75372fddaf4e9 Mon Sep 17 00:00:00 2001
+From: Vasant Hegde <vasant.hegde@amd.com>
+Date: Thu, 18 May 2023 05:43:51 +0000
+Subject: iommu/amd/pgtbl_v2: Fix domain max address
+
+From: Vasant Hegde <vasant.hegde@amd.com>
+
+commit 11c439a19466e7feaccdbce148a75372fddaf4e9 upstream.
+
+IOMMU v2 page table supports 4 level (47 bit) or 5 level (56 bit) virtual
+address space. Current code assumes it can support 64bit IOVA address
+space. If IOVA allocator allocates virtual address > 47/56 bit (depending
+on page table level) then it will do wrong mapping and cause invalid
+translation.
+
+Hence adjust aperture size to use max address supported by the page table.
+
+Reported-by: Jerry Snitselaar <jsnitsel@redhat.com>
+Fixes: aaac38f61487 ("iommu/amd: Initial support for AMD IOMMU v2 page table")
+Cc: <Stable@vger.kernel.org> # v6.0+
+Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
+Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
+Link: https://lore.kernel.org/r/20230518054351.9626-1-vasant.hegde@amd.com
+Signed-off-by: Joerg Roedel <jroedel@suse.de>
+[ Modified to work with "V2 with 4 level page table" only - Vasant ]
+Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/iommu/amd/iommu.c | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+--- a/drivers/iommu/amd/iommu.c
++++ b/drivers/iommu/amd/iommu.c
+@@ -2101,6 +2101,15 @@ out_err:
+ return NULL;
+ }
+
++static inline u64 dma_max_address(void)
++{
++ if (amd_iommu_pgtable == AMD_IOMMU_V1)
++ return ~0ULL;
++
++ /* V2 with 4 level page table */
++ return ((1ULL << PM_LEVEL_SHIFT(PAGE_MODE_4_LEVEL)) - 1);
++}
++
+ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
+ {
+ struct protection_domain *domain;
+@@ -2117,7 +2126,7 @@ static struct iommu_domain *amd_iommu_do
+ return NULL;
+
+ domain->domain.geometry.aperture_start = 0;
+- domain->domain.geometry.aperture_end = ~0ULL;
++ domain->domain.geometry.aperture_end = dma_max_address();
+ domain->domain.geometry.force_aperture = true;
+
+ return &domain->domain;
keys-asymmetric-copy-sig-and-digest-in-public_key_verify_signature.patch
fs-ntfs3-validate-mft-flags-before-replaying-logs.patch
regmap-account-for-register-length-when-chunking.patch
+tpm-tpm_tis-request-threaded-interrupt-handler.patch
+iommu-amd-pgtbl_v2-fix-domain-max-address.patch
+drm-amd-display-have-payload-properly-created-after-resume.patch
--- /dev/null
+From 0c7e66e5fd69bf21034c9a9b081d7de7c3eb2cea Mon Sep 17 00:00:00 2001
+From: Lino Sanfilippo <l.sanfilippo@kunbus.com>
+Date: Thu, 24 Nov 2022 14:55:34 +0100
+Subject: tpm, tpm_tis: Request threaded interrupt handler
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Lino Sanfilippo <l.sanfilippo@kunbus.com>
+
+commit 0c7e66e5fd69bf21034c9a9b081d7de7c3eb2cea upstream.
+
+The TIS interrupt handler at least has to read and write the interrupt
+status register. In case of SPI both operations result in a call to
+tpm_tis_spi_transfer() which uses the bus_lock_mutex of the spi device
+and thus must only be called from a sleepable context.
+
+To ensure this request a threaded interrupt handler.
+
+Signed-off-by: Lino Sanfilippo <l.sanfilippo@kunbus.com>
+Tested-by: Michael Niewöhner <linux@mniewoehner.de>
+Tested-by: Jarkko Sakkinen <jarkko@kernel.org>
+Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
+Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/char/tpm/tpm_tis_core.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/drivers/char/tpm/tpm_tis_core.c
++++ b/drivers/char/tpm/tpm_tis_core.c
+@@ -805,8 +805,11 @@ static int tpm_tis_probe_irq_single(stru
+ int rc;
+ u32 int_status;
+
+- if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
+- dev_name(&chip->dev), chip) != 0) {
++
++ rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL,
++ tis_int_handler, IRQF_ONESHOT | flags,
++ dev_name(&chip->dev), chip);
++ if (rc) {
+ dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
+ irq);
+ return -1;
projects / thirdparty / kernel / stable-queue.git / commitdiff
