{
if (low[i])
/* it's already been figured out */;
- else if (GET_CODE (operands[i]) == MEM
+ else if (MEM_P (operands[i])
&& (GET_CODE (XEXP (operands[i], 0)) == POST_INC))
{
rtx addr = XEXP (operands[i], 0);
reg1 = 0; ireg = 0; breg = 0; offset = 0;
if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
- || GET_CODE (XEXP (addr, 0)) == MEM)
+ || MEM_P (XEXP (addr, 0)))
{
offset = XEXP (addr, 0);
addr = XEXP (addr, 1);
}
else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
- || GET_CODE (XEXP (addr, 1)) == MEM)
+ || MEM_P (XEXP (addr, 1)))
{
offset = XEXP (addr, 1);
addr = XEXP (addr, 0);
ireg = XEXP (addr, 0);
addr = XEXP (addr, 1);
}
- else if (GET_CODE (XEXP (addr, 1)) == REG)
+ else if (REG_P (XEXP (addr, 1)))
{
reg1 = XEXP (addr, 1);
addr = XEXP (addr, 0);
}
- else if (GET_CODE (XEXP (addr, 0)) == REG)
+ else if (REG_P (XEXP (addr, 0)))
{
reg1 = XEXP (addr, 0);
addr = XEXP (addr, 1);
else
gcc_unreachable ();
- if (GET_CODE (addr) == REG)
+ if (REG_P (addr))
{
if (reg1)
ireg = addr;
{
gcc_assert (GET_CODE (addr) == PLUS);
if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
- || GET_CODE (XEXP (addr, 0)) == MEM)
+ || MEM_P (XEXP (addr, 0)))
{
if (offset)
{
}
offset = XEXP (addr, 0);
}
- else if (GET_CODE (XEXP (addr, 0)) == REG)
+ else if (REG_P (XEXP (addr, 0)))
{
if (reg1)
ireg = reg1, breg = XEXP (addr, 0), reg1 = 0;
}
if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
- || GET_CODE (XEXP (addr, 1)) == MEM)
+ || MEM_P (XEXP (addr, 1)))
{
if (offset)
{
}
offset = XEXP (addr, 1);
}
- else if (GET_CODE (XEXP (addr, 1)) == REG)
+ else if (REG_P (XEXP (addr, 1)))
{
if (reg1)
ireg = reg1, breg = XEXP (addr, 1), reg1 = 0;
/* If REG1 is nonzero, figure out if it is a base or index register. */
if (reg1)
{
- if (breg != 0 || (offset && GET_CODE (offset) == MEM))
+ if (breg != 0 || (offset && MEM_P (offset)))
{
gcc_assert (!ireg);
ireg = reg1;
{
if (GET_CODE (ireg) == MULT)
ireg = XEXP (ireg, 0);
- gcc_assert (GET_CODE (ireg) == REG);
+ gcc_assert (REG_P (ireg));
fprintf (file, "[%s]", reg_names[REGNO (ireg)]);
}
break;
static int
vax_address_cost (rtx x)
{
- return (1 + (GET_CODE (x) == REG ? 0 : vax_address_cost_1 (x)));
+ return (1 + (REG_P (x) ? 0 : vax_address_cost_1 (x)));
}
/* Cost of an expression on a VAX. This version has costs tuned for the
else
*total = 3; /* 4 on VAX 2 */
x = XEXP (x, 0);
- if (GET_CODE (x) != REG && GET_CODE (x) != POST_INC)
+ if (!REG_P (x) && GET_CODE (x) != POST_INC)
*total += vax_address_cost_1 (x);
return true;
break;
case MEM:
*total += 1; /* 2 on VAX 2 */
- if (GET_CODE (XEXP (op, 0)) != REG)
+ if (!REG_P (XEXP (op, 0)))
*total += vax_address_cost_1 (XEXP (op, 0));
break;
case REG:
}
else
CC_STATUS_INIT;
- if (cc_status.value1 && GET_CODE (cc_status.value1) == REG
+ if (cc_status.value1 && REG_P (cc_status.value1)
&& cc_status.value2
&& reg_overlap_mentioned_p (cc_status.value1, cc_status.value2))
cc_status.value2 = 0;
- if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM
+ if (cc_status.value1 && MEM_P (cc_status.value1)
&& cc_status.value2
- && GET_CODE (cc_status.value2) == MEM)
+ && MEM_P (cc_status.value2))
cc_status.value2 = 0;
/* Actual condition, one line up, should be that value2's address
depends on value1, but that is too much of a pain. */
return "subl2 $%n2,%0";
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned) INTVAL (operands[2]) >= 64
- && GET_CODE (operands[1]) == REG
+ && REG_P (operands[1])
&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
|| REGNO (operands[1]) > 11))
return "movab %c2(%1),%0";
if (GET_CODE (operands[2]) == CONST_INT
&& INTVAL (operands[2]) < 32767
&& INTVAL (operands[2]) > -32768
- && GET_CODE (operands[1]) == REG
+ && REG_P (operands[1])
&& push_operand (operands[0], SImode))
return "pushab %c2(%1)";
if (GET_CODE (operands[2]) == CONST_INT
&& (unsigned) INTVAL (operands[2]) >= 64
- && GET_CODE (operands[1]) == REG
+ && REG_P (operands[1])
&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
|| REGNO (operands[1]) > 11))
return "movab %c2(%1),%0";
/* Nonzero if X is a hard reg that can be used as an index
or, if not strict, if it is a pseudo reg. */
#define INDEX_REGISTER_P(X, STRICT) \
-(GET_CODE (X) == REG && (!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
+(REG_P (X) && (!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
/* Nonzero if X is a hard reg that can be used as a base reg
or, if not strict, if it is a pseudo reg. */
#define BASE_REGISTER_P(X, STRICT) \
-(GET_CODE (X) == REG && (!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
+(REG_P (X) && (!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
#ifdef NO_EXTERNAL_INDIRECT_ADDRESS
nonindexed_address_p (rtx x, int strict)
{
rtx xfoo0;
- if (GET_CODE (x) == REG)
+ if (REG_P (x))
{
extern rtx *reg_equiv_mem;
if (! reload_in_progress
if (indirectable_address_p (x, strict))
return 1;
xfoo0 = XEXP (x, 0);
- if (GET_CODE (x) == MEM && indirectable_address_p (xfoo0, strict))
+ if (MEM_P (x) && indirectable_address_p (xfoo0, strict))
return 1;
if ((GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
&& BASE_REGISTER_P (xfoo0, strict))
xfoo0 = XEXP (x, 0);
xfoo1 = XEXP (x, 1);
- if (CONSTANT_ADDRESS_P (xfoo0) && GET_CODE (xfoo1) == REG)
+ if (CONSTANT_ADDRESS_P (xfoo0) && REG_P (xfoo1))
return 0;
- if (CONSTANT_ADDRESS_P (xfoo1) && GET_CODE (xfoo0) == REG)
+ if (CONSTANT_ADDRESS_P (xfoo1) && REG_P (xfoo0))
return 0;
return 1;
{
if (operands[2] == const1_rtx && rtx_equal_p (operands[0], operands[1]))
return \"addl2 %0,%0\";
- if (GET_CODE (operands[1]) == REG
+ if (REG_P (operands[1])
&& GET_CODE (operands[2]) == CONST_INT)
{
int i = INTVAL (operands[2]);
(match_operand:SI 3 "general_operand" "g"))]
"(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16)
&& INTVAL (operands[2]) % INTVAL (operands[1]) == 0
- && (GET_CODE (operands[0]) == REG
+ && (REG_P (operands[0])
|| ! mode_dependent_address_p (XEXP (operands[0], 0)))"
"*
{
(match_operand:SI 3 "const_int_operand" "n")))]
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0
- && (GET_CODE (operands[1]) == REG
+ && (REG_P (operands[1])
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))"
"*
{
(match_operand:SI 3 "const_int_operand" "n")))]
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0
- && (GET_CODE (operands[1]) == REG
+ && (REG_P (operands[1])
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))"
"*
{
"*
{
if (GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[2]) != CONST_INT
- || GET_CODE (operands[0]) != REG
+ || !REG_P (operands[0])
|| (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16))
return \"extv %3,%2,%1,%0\";
if (INTVAL (operands[2]) == 8)
"*
{
if (GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[2]) != CONST_INT
- || GET_CODE (operands[0]) != REG)
+ || !REG_P (operands[0]))
return \"extzv %3,%2,%1,%0\";
if (INTVAL (operands[2]) == 8)
return \"rotl %R3,%1,%0\;movzbl %0,%0\";
""
"*
{
- if (GET_CODE (operands[0]) != REG || GET_CODE (operands[2]) != CONST_INT
+ if (!REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
|| GET_CODE (operands[3]) != CONST_INT
|| (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16)
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|| side_effects_p (operands[1])
- || (GET_CODE (operands[1]) == MEM
+ || (MEM_P (operands[1])
&& mode_dependent_address_p (XEXP (operands[1], 0))))
return \"extv %3,%2,%1,%0\";
if (INTVAL (operands[2]) == 8)
""
"*
{
- if (GET_CODE (operands[0]) != REG || GET_CODE (operands[2]) != CONST_INT
+ if (! REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
|| GET_CODE (operands[3]) != CONST_INT
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|| side_effects_p (operands[1])
- || (GET_CODE (operands[1]) == MEM
+ || (MEM_P (operands[1])
&& mode_dependent_address_p (XEXP (operands[1], 0))))
return \"extzv %3,%2,%1,%0\";
if (INTVAL (operands[2]) == 8)