aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]

The following testcase ICEs, because aarch64_gen_compare_reg_maybe_ze emits
invalid RTL.
For y_mode [QH]Imode it expects y to be of that mode (or CONST_INT that fits
into that mode) and x being SImode; for non-CONST_INT y it zero extends y
into SImode and compares that against x, for CONST_INT y it zero extends y
into SImode.  The problem is that when the zero extended constant isn't
usable directly, it forces it into a REG, but with y_mode mode, and then
compares against y.  That is wrong, because it should force it into a SImode
REG and compare that way.

2020-04-02  Jakub Jelinek  <jakub@redhat.com>

	PR target/94435
	* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
	y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.

	* gcc.target/aarch64/pr94435.c: New test.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6df3a17a645c4c0abbddc1816aa1ed6aa7e3b507..1f20cbd8c734e6a67482debb7973ac14a8e8c938 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-04-02  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/94435
+       * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
+       y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
+
 2020-04-02  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 
        PR target/94317

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1249f46ed8842c5a352d2528526c837501db0267..16940b44c826a02ac937870753da62df9624f973 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-04-02  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/94435
+       * gcc.target/aarch64/pr94435.c: New test.
+
 2020-04-02  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
 
        PR target/94317