drm/i915: Document which RING_FAULT bits apply to which platforms

The RING_FAULT bits have change a bit over the years. Document
which platforms use which bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250211231941.22769-5-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index ac8696fbca3f5df463408eefd7f11979a0eabd5e..e550d4f9c3e61c3f56798a1c656573a1f02c0f17 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -326,10 +326,10 @@
                                                            _RING_FAULT_REG_VCS, \
                                                            _RING_FAULT_REG_VECS, \
                                                            _RING_FAULT_REG_BCS))
-#define   RING_FAULT_ENGINE_ID_MASK            REG_GENMASK(16, 12)
-#define   RING_FAULT_GTTSEL_MASK               REG_BIT(11)
+#define   RING_FAULT_ENGINE_ID_MASK            REG_GENMASK(16, 12) /* bdw+ */
+#define   RING_FAULT_GTTSEL_MASK               REG_BIT(11) /* pre-bdw */
 #define   RING_FAULT_SRCID_MASK                        REG_GENMASK(10, 3)
-#define   RING_FAULT_FAULT_TYPE_MASK           REG_GENMASK(2, 1)
+#define   RING_FAULT_FAULT_TYPE_MASK           REG_GENMASK(2, 1) /* ivb+ */
 #define   RING_FAULT_VALID                     REG_BIT(0)
 
 #define ERROR_GEN6                             _MMIO(0x40a0)