3.4-stable patches

added patches:
	drm-i915-disable-shared-panel-fitter-for-pipe.patch
	drm-i915-set-i9xx-sdvo-clock-limits-according-to-specifications.patch

diff --git a/queue-3.4/drm-i915-disable-shared-panel-fitter-for-pipe.patch b/queue-3.4/drm-i915-disable-shared-panel-fitter-for-pipe.patch
new file mode 100644 (file)
index 0000000..4256bf9
--- /dev/null
+++ b/queue-3.4/drm-i915-disable-shared-panel-fitter-for-pipe.patch
@@ -0,0 +1,51 @@
+From 24a1f16de97c4cf0029d9acd04be06db32208726 Mon Sep 17 00:00:00 2001
+From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
+Date: Fri, 8 Feb 2013 16:35:37 +0200
+Subject: drm/i915: disable shared panel fitter for pipe
+
+From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
+
+commit 24a1f16de97c4cf0029d9acd04be06db32208726 upstream.
+
+If encoder is switched off by BIOS, but the panel fitter is left on,
+we never try to turn off the panel fitter and leave it still attached
+to the pipe - which can cause blurry output elsewhere.
+
+Based on work by Chris Wilson <chris@chris-wilson.co.uk>
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58867
+Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
+Tested-by: Andreas Sturmlechner <andreas.sturmlechner@gmail.com>
+[danvet: Remove the redundant HAS_PCH_SPLIT check and add a tiny
+comment.]
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c |    8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -3303,6 +3303,7 @@ static void i9xx_crtc_disable(struct drm
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       int pipe = intel_crtc->pipe;
+       int plane = intel_crtc->plane;
++      u32 pctl;
+ 
+       if (!intel_crtc->active)
+               return;
+@@ -3318,6 +3319,13 @@ static void i9xx_crtc_disable(struct drm
+ 
+       intel_disable_plane(dev_priv, plane, pipe);
+       intel_disable_pipe(dev_priv, pipe);
++
++      /* Disable pannel fitter if it is on this pipe. */
++      pctl = I915_READ(PFIT_CONTROL);
++      if ((pctl & PFIT_ENABLE) &&
++          ((pctl & PFIT_PIPE_MASK) >> PFIT_PIPE_SHIFT) == pipe)
++              I915_WRITE(PFIT_CONTROL, 0);
++
+       intel_disable_pll(dev_priv, pipe);
+ 
+       intel_crtc->active = false;

diff --git a/queue-3.4/drm-i915-set-i9xx-sdvo-clock-limits-according-to-specifications.patch b/queue-3.4/drm-i915-set-i9xx-sdvo-clock-limits-according-to-specifications.patch
new file mode 100644 (file)
index 0000000..f157184
--- /dev/null
+++ b/queue-3.4/drm-i915-set-i9xx-sdvo-clock-limits-according-to-specifications.patch
@@ -0,0 +1,36 @@
+From 4f7dfb6788dd022446847fbbfbe45e13bedb5be2 Mon Sep 17 00:00:00 2001
+From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+Date: Wed, 13 Feb 2013 22:20:22 +0100
+Subject: drm/i915: Set i9xx sdvo clock limits according to specifications
+
+From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+
+commit 4f7dfb6788dd022446847fbbfbe45e13bedb5be2 upstream.
+
+The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9.
+Since we do all calculations based on them being register values (which are
+subtracted by 2) we need to specify them accordingly.
+
+Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56359
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -142,8 +142,8 @@ static const intel_limit_t intel_limits_
+       .vco = { .min = 1400000, .max = 2800000 },
+       .n = { .min = 1, .max = 6 },
+       .m = { .min = 70, .max = 120 },
+-      .m1 = { .min = 10, .max = 22 },
+-      .m2 = { .min = 5, .max = 9 },
++      .m1 = { .min = 8, .max = 18 },
++      .m2 = { .min = 3, .max = 7 },
+       .p = { .min = 5, .max = 80 },
+       .p1 = { .min = 1, .max = 8 },
+       .p2 = { .dot_limit = 200000,

diff --git a/queue-3.4/series b/queue-3.4/series
index 8051b0605b166d0f8699177fcc0f43d956c17a80..c3c4f69de58be06d6427c0f5dff9d0434b39a1ff 100644 (file)
--- a/queue-3.4/series
+++ b/queue-3.4/series
@@ -50,3 +50,5 @@ drm-use-c8-instead-of-rgb332-when-determining-the-format-from-depth-bpp.patch
 drm-usb-bind-driver-to-correct-device.patch
 target-fix-divide-by-zero-bug-in-fabric_max_sectors-for-unconfigured-devices.patch
 intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch
+drm-i915-disable-shared-panel-fitter-for-pipe.patch
+drm-i915-set-i9xx-sdvo-clock-limits-according-to-specifications.patch