]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.0-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 3 Jun 2015 02:56:44 +0000 (11:56 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 3 Jun 2015 02:56:44 +0000 (11:56 +0900)
added patches:
arm-8325-1-exynos-move-resume-code-to-.text-section.patch

queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch [new file with mode: 0644]
queue-4.0/series

diff --git a/queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch b/queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch
new file mode 100644 (file)
index 0000000..4d3177c
--- /dev/null
@@ -0,0 +1,84 @@
+From 12833bacf5d904c2dac0c3f52b2ebde5f2c5a2bc Mon Sep 17 00:00:00 2001
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Date: Wed, 25 Mar 2015 07:41:43 +0100
+Subject: ARM: 8325/1: exynos: move resume code to .text section
+
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+
+commit 12833bacf5d904c2dac0c3f52b2ebde5f2c5a2bc upstream.
+
+This code calls cpu_resume() using a straight branch (b), so
+now that we have moved cpu_resume() back to .text, this should
+be moved there as well. Any direct references to symbols that will
+remain in the .data section are replaced with explicit PC-relative
+references.
+
+Acked-by: Nicolas Pitre <nico@linaro.org>
+Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Kevin Hilman <khilman@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-exynos/sleep.S |   31 ++++++++++++++++---------------
+ 1 file changed, 16 insertions(+), 15 deletions(-)
+
+--- a/arch/arm/mach-exynos/sleep.S
++++ b/arch/arm/mach-exynos/sleep.S
+@@ -23,14 +23,7 @@
+ #define CPU_MASK      0xff0ffff0
+ #define CPU_CORTEX_A9 0x410fc090
+-      /*
+-       * The following code is located into the .data section. This is to
+-       * allow l2x0_regs_phys to be accessed with a relative load while we
+-       * can't rely on any MMU translation. We could have put l2x0_regs_phys
+-       * in the .text section as well, but some setups might insist on it to
+-       * be truly read-only. (Reference from: arch/arm/kernel/sleep.S)
+-       */
+-      .data
++      .text
+       .align
+       /*
+@@ -69,10 +62,12 @@ ENTRY(exynos_cpu_resume_ns)
+       cmp     r0, r1
+       bne     skip_cp15
+-      adr     r0, cp15_save_power
++      adr     r0, _cp15_save_power
+       ldr     r1, [r0]
+-      adr     r0, cp15_save_diag
++      ldr     r1, [r0, r1]
++      adr     r0, _cp15_save_diag
+       ldr     r2, [r0]
++      ldr     r2, [r0, r2]
+       mov     r0, #SMC_CMD_C15RESUME
+       dsb
+       smc     #0
+@@ -118,14 +113,20 @@ skip_l2x0:
+ skip_cp15:
+       b       cpu_resume
+ ENDPROC(exynos_cpu_resume_ns)
++
++      .align
++_cp15_save_power:
++      .long   cp15_save_power - .
++_cp15_save_diag:
++      .long   cp15_save_diag - .
++#ifdef CONFIG_CACHE_L2X0
++1:    .long   l2x0_saved_regs - .
++#endif /* CONFIG_CACHE_L2X0 */
++
++      .data
+       .globl cp15_save_diag
+ cp15_save_diag:
+       .long   0       @ cp15 diagnostic
+       .globl cp15_save_power
+ cp15_save_power:
+       .long   0       @ cp15 power control
+-
+-#ifdef CONFIG_CACHE_L2X0
+-      .align
+-1:    .long   l2x0_saved_regs - .
+-#endif /* CONFIG_CACHE_L2X0 */
index 49137588b5d8e81937d6a3a56875be35d99ff037..e5e740109a73397fc77ecaf4ed086d0c9ff44100 100644 (file)
@@ -92,3 +92,4 @@ libata-ignore-spurious-phy-event-on-lpm-policy-change.patch
 libata-blacklist-queued-trim-on-all-samsung-800-series.patch
 arm64-bpf-fix-signedness-bug-in-loading-64-bit-immediate.patch
 rt2x00-add-new-rt2800usb-device-dwa-130.patch
+arm-8325-1-exynos-move-resume-code-to-.text-section.patch