]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
6.17-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 6 Oct 2025 10:08:52 +0000 (12:08 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 6 Oct 2025 10:08:52 +0000 (12:08 +0200)
added patches:
drm-amdgpu-enable-mes-lr_compute_wa-by-default.patch
series

queue-6.17/drm-amdgpu-enable-mes-lr_compute_wa-by-default.patch [new file with mode: 0644]
queue-6.17/series [new file with mode: 0644]

diff --git a/queue-6.17/drm-amdgpu-enable-mes-lr_compute_wa-by-default.patch b/queue-6.17/drm-amdgpu-enable-mes-lr_compute_wa-by-default.patch
new file mode 100644 (file)
index 0000000..6a71558
--- /dev/null
@@ -0,0 +1,80 @@
+From 1fb710793ce2619223adffaf981b1ff13cd48f17 Mon Sep 17 00:00:00 2001
+From: Mario Limonciello <mario.limonciello@amd.com>
+Date: Thu, 18 Sep 2025 19:48:00 -0500
+Subject: drm/amdgpu: Enable MES lr_compute_wa by default
+
+From: Mario Limonciello <mario.limonciello@amd.com>
+
+commit 1fb710793ce2619223adffaf981b1ff13cd48f17 upstream.
+
+The MES set resources packet has an optional bit 'lr_compute_wa'
+which can be used for preventing MES hangs on long compute jobs.
+
+Set this bit by default.
+
+Co-developed-by: Yifan Zhang <yifan1.zhang@amd.com>
+Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/mes_v11_0.c        |    6 ++++++
+ drivers/gpu/drm/amd/amdgpu/mes_v12_0.c        |    5 +++++
+ drivers/gpu/drm/amd/include/mes_v11_api_def.h |    3 ++-
+ drivers/gpu/drm/amd/include/mes_v12_api_def.h |    3 ++-
+ 4 files changed, 15 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+@@ -711,6 +711,12 @@ static int mes_v11_0_set_hw_resources(st
+       mes_set_hw_res_pkt.enable_reg_active_poll = 1;
+       mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
+       mes_set_hw_res_pkt.oversubscription_timer = 50;
++      if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x7f)
++              mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
++      else
++              dev_info_once(mes->adev->dev,
++                            "MES FW version must be >= 0x7f to enable LR compute workaround.\n");
++
+       if (amdgpu_mes_log_enable) {
+               mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;
+               mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr =
+--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+@@ -738,6 +738,11 @@ static int mes_v12_0_set_hw_resources(st
+       mes_set_hw_res_pkt.use_different_vmid_compute = 1;
+       mes_set_hw_res_pkt.enable_reg_active_poll = 1;
+       mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
++      if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x82)
++              mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
++      else
++              dev_info_once(adev->dev,
++                            "MES FW version must be >= 0x82 to enable LR compute workaround.\n");
+       /*
+        * Keep oversubscribe timer for sdma . When we have unmapped doorbell
+--- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
++++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
+@@ -238,7 +238,8 @@ union MESAPI_SET_HW_RESOURCES {
+                               uint32_t enable_mes_sch_stb_log : 1;
+                               uint32_t limit_single_process : 1;
+                               uint32_t is_strix_tmz_wa_enabled  :1;
+-                              uint32_t reserved : 13;
++                              uint32_t enable_lr_compute_wa : 1;
++                              uint32_t reserved : 12;
+                       };
+                       uint32_t        uint32_t_all;
+               };
+--- a/drivers/gpu/drm/amd/include/mes_v12_api_def.h
++++ b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
+@@ -286,7 +286,8 @@ union MESAPI_SET_HW_RESOURCES {
+                               uint32_t limit_single_process : 1;
+                               uint32_t unmapped_doorbell_handling: 2;
+                               uint32_t enable_mes_fence_int: 1;
+-                              uint32_t reserved : 10;
++                              uint32_t enable_lr_compute_wa : 1;
++                              uint32_t reserved : 9;
+                       };
+                       uint32_t uint32_all;
+               };
diff --git a/queue-6.17/series b/queue-6.17/series
new file mode 100644 (file)
index 0000000..e00e5cc
--- /dev/null
@@ -0,0 +1 @@
+drm-amdgpu-enable-mes-lr_compute_wa-by-default.patch