]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 3 Feb 2022 17:52:21 +0000 (12:52 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 7 Feb 2022 23:03:50 +0000 (18:03 -0500)
To align with other headers.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h [moved from drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h [moved from drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h with 100% similarity]

index 0602bde78e6cadd21b8e2076b63b6b2ab6696895..589131d415fdc6ff7e7079104ad7d8daf491ea70 100644 (file)
@@ -42,8 +42,8 @@
 
 #include "nbio/nbio_7_4_offset.h"
 
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 
 #include "mmhub/mmhub_2_0_0_offset.h"
 #include "mmhub/mmhub_2_0_0_sh_mask.h"
index 8ca26383b5687ca383bc2c9c3fb6d72f72c90a26..f10f7a0ca02a02b68934f4286b6a1a25bd787ce0 100644 (file)
@@ -72,8 +72,8 @@
 
 #include "nbio/nbio_7_4_offset.h"
 
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 
 #include "mmhub/mmhub_2_0_0_offset.h"
 #include "mmhub/mmhub_2_0_0_sh_mask.h"
index 5d9637b0742923a47f30c0c181f516f29d021df1..4daf8931aa7ca4e6e4f16b859b95c0b080559436 100644 (file)
@@ -73,8 +73,8 @@
 
 #include "nbio/nbio_7_2_0_offset.h"
 
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 
 #include "reg_helper.h"
 #include "dce/dmub_abm.h"
index e512ae6d00d45302cbe878c5bdeb18af4fc6b50e..88318e8ffca8de8fd794576a09424b47c2798814 100644 (file)
@@ -66,8 +66,8 @@
 #include "dimgrey_cavefish_ip_offset.h"
 #include "dcn/dcn_3_0_2_offset.h"
 #include "dcn/dcn_3_0_2_sh_mask.h"
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 #include "nbio/nbio_7_4_offset.h"
 #include "amdgpu_socbb.h"
 
index 5f6ae3edb755bdeca0d1f4350263509e78d1a93b..3b7df1ac26be3e7e64828c40ba8903db0d811b54 100644 (file)
@@ -42,8 +42,8 @@
 
 #include "nbio/nbio_7_4_offset.h"
 
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 
 #include "mmhub/mmhub_2_0_0_offset.h"
 #include "mmhub/mmhub_2_0_0_sh_mask.h"
index 0046219a1cc7c154eb0c696db44afba728bc5257..6b6b7c7bd12f365101bacc7f8f2c89c5f1bfe41b 100644 (file)
@@ -40,8 +40,8 @@
 
 #include "nbio/nbio_7_4_offset.h"
 
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 
 #include "mmhub/mmhub_2_0_0_offset.h"
 #include "mmhub/mmhub_2_0_0_sh_mask.h"
index 914ce2ce1c2fcd0aa2e05a88058fd5192563c280..0b68c08fac3f0877c4c6f7b3da5d081bc0ac6629 100644 (file)
@@ -37,8 +37,8 @@
 
 #include "nbio/nbio_7_4_offset.h"
 
-#include "dcn/dpcs_3_0_0_offset.h"
-#include "dcn/dpcs_3_0_0_sh_mask.h"
+#include "dpcs/dpcs_3_0_0_offset.h"
+#include "dpcs/dpcs_3_0_0_sh_mask.h"
 
 #include "mmhub/mmhub_2_0_0_offset.h"
 #include "mmhub/mmhub_2_0_0_sh_mask.h"