]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
RDMA/hns: Don't modify rq next block addr in HIP09 QPC
authorJunxian Huang <huangjunxian6@hisilicon.com>
Fri, 6 Sep 2024 09:34:36 +0000 (17:34 +0800)
committerLeon Romanovsky <leon@kernel.org>
Tue, 10 Sep 2024 13:06:39 +0000 (16:06 +0300)
The field 'rq next block addr' in QPC can be updated by driver only
on HIP08. On HIP09 HW updates this field while driver is not allowed.

Fixes: 926a01dc000d ("RDMA/hns: Add QP operations support for hip08 SoC")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Link: https://patch.msgid.link/20240906093444.3571619-2-huangjunxian6@hisilicon.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/infiniband/hw/hns/hns_roce_hw_v2.c

index 621b057fb9daa61fd36507a8f682bc691571ee25..a166b476977f151e98dbc73d8f75272fb7f573c4 100644 (file)
@@ -4423,12 +4423,14 @@ static int config_qp_rq_buf(struct hns_roce_dev *hr_dev,
                     upper_32_bits(to_hr_hw_page_addr(mtts[0])));
        hr_reg_clear(qpc_mask, QPC_RQ_CUR_BLK_ADDR_H);
 
-       context->rq_nxt_blk_addr = cpu_to_le32(to_hr_hw_page_addr(mtts[1]));
-       qpc_mask->rq_nxt_blk_addr = 0;
-
-       hr_reg_write(context, QPC_RQ_NXT_BLK_ADDR_H,
-                    upper_32_bits(to_hr_hw_page_addr(mtts[1])));
-       hr_reg_clear(qpc_mask, QPC_RQ_NXT_BLK_ADDR_H);
+       if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08) {
+               context->rq_nxt_blk_addr =
+                               cpu_to_le32(to_hr_hw_page_addr(mtts[1]));
+               qpc_mask->rq_nxt_blk_addr = 0;
+               hr_reg_write(context, QPC_RQ_NXT_BLK_ADDR_H,
+                            upper_32_bits(to_hr_hw_page_addr(mtts[1])));
+               hr_reg_clear(qpc_mask, QPC_RQ_NXT_BLK_ADDR_H);
+       }
 
        return 0;
 }