]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
irqchip/apple-aic: Only handle PMC interrupt as FIQ when configured so
authorNick Chan <towinchenmi@gmail.com>
Sat, 18 Jan 2025 16:31:42 +0000 (00:31 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Mon, 27 Jan 2025 17:39:15 +0000 (18:39 +0100)
The CPU PMU in Apple SoCs can be configured to fire its interrupt in one of
several ways, and since Apple A11 one of the methods is FIQ, but the check
of the configuration register fails to test explicitely for FIQ mode. It
tests whether the IMODE bitfield is zero or not and the PMCRO_IACT bit is
set. That results in false positives when the IMODE bitfield is not zero,
but does not have the mode PMCR0_IMODE_FIQ.

Only handle the PMC interrupt as a FIQ when the CPU PMU has been configured
to fire FIQs, i.e. the IMODE bitfield value is PMCR0_IMODE_FIQ and
PMCR0_IACT is set.

Fixes: c7708816c944 ("irqchip/apple-aic: Wire PMU interrupts")
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/all/20250118163554.16733-1-towinchenmi@gmail.com
drivers/irqchip/irq-apple-aic.c

index da5250f0155cfad1d1171558e1d63f61b25cbad1..2b1684c60e3cacfa1dd98eeec37bf69285bcf101 100644 (file)
@@ -577,7 +577,8 @@ static void __exception_irq_entry aic_handle_fiq(struct pt_regs *regs)
                                                  AIC_FIQ_HWIRQ(AIC_TMR_EL02_VIRT));
        }
 
-       if (read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & PMCR0_IACT) {
+       if ((read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & (PMCR0_IMODE | PMCR0_IACT)) ==
+                       (FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_FIQ) | PMCR0_IACT)) {
                int irq;
                if (cpumask_test_cpu(smp_processor_id(),
                                     &aic_irqc->fiq_aff[AIC_CPU_PMU_P]->aff))