]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: Add HWCAP advertising FEAT_WFXT
authorMarc Zyngier <maz@kernel.org>
Wed, 20 Apr 2022 12:21:12 +0000 (13:21 +0100)
committerMarc Zyngier <maz@kernel.org>
Wed, 20 Apr 2022 12:24:44 +0000 (13:24 +0100)
In order to allow userspace to enjoy WFET, add a new HWCAP that
advertises it when available.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220419182755.601427-9-maz@kernel.org
Documentation/arm64/cpu-feature-registers.rst
Documentation/arm64/elf_hwcaps.rst
arch/arm64/include/asm/hwcap.h
arch/arm64/include/uapi/asm/hwcap.h
arch/arm64/kernel/cpufeature.c
arch/arm64/kernel/cpuinfo.c
arch/arm64/tools/cpucaps

index 749ae970c31955a6ddd54807d4f7a0700cf85295..04ba83e1965fb8766aef330cd53c71d975ee9885 100644 (file)
@@ -290,6 +290,8 @@ infrastructure:
      +------------------------------+---------+---------+
      | RPRES                        | [7-4]   |    y    |
      +------------------------------+---------+---------+
+     | WFXT                         | [3-0]   |    y    |
+     +------------------------------+---------+---------+
 
 
 Appendix I: Example
index a8f30963e550d372763b3b1a63a7fb38d733b533..af3ab524e826d1b1a72a29e36f748fdf353dcdd7 100644 (file)
@@ -264,6 +264,10 @@ HWCAP2_MTE3
     Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described
     by Documentation/arm64/memory-tagging-extension.rst.
 
+HWCAP2_WFXT
+
+    Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010.
+
 4. Unused AT_HWCAP bits
 -----------------------
 
index 8db5ec0089dbd3d476da432faa316102860b1bde..909337b50e1f47775eca0082c9d767b98dc82645 100644 (file)
 #define KERNEL_HWCAP_AFP               __khwcap2_feature(AFP)
 #define KERNEL_HWCAP_RPRES             __khwcap2_feature(RPRES)
 #define KERNEL_HWCAP_MTE3              __khwcap2_feature(MTE3)
+#define KERNEL_HWCAP_WFXT              __khwcap2_feature(WFXT)
 
 /*
  * This yields a mask that user programs can use to figure out what
index 99cb5d383048dd8dedb08f51be0d3951dc6b0f4f..9dddde1d046cce42b966dc58f9115a81a047d664 100644 (file)
@@ -79,5 +79,6 @@
 #define HWCAP2_AFP             (1 << 20)
 #define HWCAP2_RPRES           (1 << 21)
 #define HWCAP2_MTE3            (1 << 22)
+#define HWCAP2_WFXT            (1 << 23)
 
 #endif /* _UAPI__ASM_HWCAP_H */
index d72c4b4d389c4130741e5a56df1159a9049d063d..a6db8ca04429393d8df9b4d42af68325bb1c0abc 100644 (file)
@@ -237,6 +237,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
        ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
                       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_GPA3_SHIFT, 4, 0),
        ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_RPRES_SHIFT, 4, 0),
+       ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_WFXT_SHIFT, 4, 0),
        ARM64_FTR_END,
 };
 
@@ -2575,6 +2576,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
        HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV),
        HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP),
        HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_RPRES_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_RPRES),
+       HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_WFXT_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR2_WFXT_SUPPORTED, CAP_HWCAP, KERNEL_HWCAP_WFXT),
        {},
 };
 
index 330b92ea863aad3e61e7559ebc8a37de215497b5..781eab314794646410f55e24dfb9c90be1dc3bd7 100644 (file)
@@ -98,6 +98,7 @@ static const char *const hwcap_str[] = {
        [KERNEL_HWCAP_AFP]              = "afp",
        [KERNEL_HWCAP_RPRES]            = "rpres",
        [KERNEL_HWCAP_MTE3]             = "mte3",
+       [KERNEL_HWCAP_WFXT]             = "wfxt",
 };
 
 #ifdef CONFIG_COMPAT
index 3ed418f70e3bd2f65283dd5fa7c3098c0ac435dd..01f7d253dec4cf74039b480d97cd39617602a225 100644 (file)
@@ -38,6 +38,7 @@ HAS_STAGE2_FWB
 HAS_SYSREG_GIC_CPUIF
 HAS_TLB_RANGE
 HAS_VIRT_HOST_EXTN
+HAS_WFXT
 HW_DBM
 KVM_PROTECTED_MODE
 MISMATCHED_CACHE_TYPE