drm/i915/fbc: Extract _intel_fbc_cfb_stride()

Pull the lower level stuff out from intel_fbc_cfb_stride() into
a separate function that doesn't depend on the plane_state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-9-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 6853573f848643e2b578b06b8c41c5742d974553..e9adb1b8b9a7a2a09aaaf6906814d39c0831dcdd 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -148,12 +148,11 @@ static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *p
 }
 
 /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
-static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane_state)
+static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
+                                          unsigned int width)
 {
-       struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
        unsigned int limit = 4; /* 1:4 compression limit is the worst case */
        unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
-       unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
        unsigned int height = 4; /* FBC segment is 4 lines */
        unsigned int stride;
 
@@ -178,22 +177,29 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
 }
 
 /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */
-static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
+static unsigned int _intel_fbc_cfb_stride(struct intel_display *display,
+                                         unsigned int width, unsigned int stride)
 {
-       struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-       unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
-
        /*
         * At least some of the platforms require each 4 line segment to
         * be 512 byte aligned. Aligning each line to 512 bytes guarantees
         * that regardless of the compression limit we choose later.
         */
        if (DISPLAY_VER(display) >= 9)
-               return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(plane_state));
+               return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, width));
        else
                return stride;
 }
 
+static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
+{
+       struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+       unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
+       unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
+
+       return _intel_fbc_cfb_stride(display, width, stride);
+}
+
 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
 {
        struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);